Hello,
I'm attempting to connect to the ARM on my LogicPD DM3730 Torpedo board from CCS v5.1, and am getting an error (see console output below).
I'm using a Spectrum Digital XDS560v2 to connect to the board. I've downloaded and installed the DaVinci Device Support Files, v1.0.3 from the TI wiki page here:
http://processors.wiki.ti.com/index.php/Device_support_files
I created my target configuration file using the CCS tool and selected the SD560v2 emulator, selected DM3730 as the target, and set the target to use the CCS 4.x / 5.x GEL files for the DM3730 from here:
http://processors.wiki.ti.com/index.php/OMAP_and_Sitara_CCS_support#DM3730_and_DM3725
When I click "Test Connection" after creating the file, the connection test completes successfully.
When I launch this target configuration and attempt to connect to the ARM, I get the console output below.
Any suggestions??
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Cortex_A8_0: GEL Output: OMAP 32K Watchdog Timer is disable
Cortex_A8_0: GEL Output: Putting DPLL into bypass before proceeding
Cortex_A8_0: GEL Output: Putting CORE DPLL into bypass before proceeding
Cortex_A8_0: GEL Output: Locking CORE DPLL
Cortex_A8_0: GEL Output: PRCM clock configuration IIA setup has been completed
Cortex_A8_0: GEL Output: SystemClock = 26.0 MHz
Cortex_A8_0: GEL Output: DPLL_MULT_VALUE = 332
Cortex_A8_0: GEL Output: DPLL_DIV_VALUE = 25
Cortex_A8_0: GEL Output: CORE_DPLL_CLK = 664.0 MHz
Cortex_A8_0: GEL Output: CORE_CLK = 332.0 MHz
Cortex_A8_0: GEL Output: L3_CLK = 166.0 MHz
Cortex_A8_0: GEL Output: mDDR Hynix H8KDS0UN0MER - 2048 Mbit(256MB) on CS0, 16M x 32bit x 4Banks
Cortex_A8_0: Trouble Writing Memory Block at 0x6d000010 on Page 0 of Length 0x4: (Error -2130 @ 0x6D000010) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.0.520.0)
Cortex_A8_0: GEL: Error while executing OnTargetConnect(): target access failed.
Cortex_A8_0: GEL Output: OMAP 32K Watchdog Timer is disable
Cortex_A8_0: GEL Output: Putting DPLL into bypass before proceeding
Cortex_A8_0: GEL Output: Putting CORE DPLL into bypass before proceeding
Cortex_A8_0: GEL Output: Locking CORE DPLL
Cortex_A8_0: GEL Output: PRCM clock configuration IIA setup has been completed
Cortex_A8_0: GEL Output: SystemClock = 26.0 MHz
Cortex_A8_0: GEL Output: DPLL_MULT_VALUE = 332
Cortex_A8_0: GEL Output: DPLL_DIV_VALUE = 25
Cortex_A8_0: GEL Output: CORE_DPLL_CLK = 664.0 MHz
Cortex_A8_0: GEL Output: CORE_CLK = 332.0 MHz
Cortex_A8_0: GEL Output: L3_CLK = 166.0 MHz
Cortex_A8_0: Trouble Writing Memory Block at 0x6d000060 on Page 0 of Length 0x4: (Error -2130 @ 0x6D000060) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.0.520.0)
Cortex_A8_0: GEL: Error while executing OnResetDetected(): target access failed.
Cortex_A8_0: Trouble Reading Register CP15_CONTROL_REGISTER: (Error -2131 @ 0x20013F00) Unable to access device register. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 5.0.520.0)