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devmem2 cannot work for DM6467, please help

jim xu
Intellectual 560 points

There is a tool that can access kernel space from user space by using devmem2 utility, but this tool doesn't work for DM6467 Linux, any update or new tools for DM6467?

All I need is to setup internal system register for video ports such as capture and display. Thanks.

  • 0
    TI__Expert 6655 points

    Hi Jim Xu,

    You have to CROSS COMPILE devmem2, so that it can be work on DM6467.

    Regards

    AnilKumar

    Please mark this Forum post as answered via the Verify Answer button below if it helps answer your question.  Thanks!

  • 0 in reply to Anil
    Intellectual 560 points

    Yes, the compilation is correct, I can ran the program, but just cannot make the register value as desired. 

  • 0 in reply to jim xu
    TI__Expert 6655 points

    Hi Jim,

    That's entirely depends on the mode of execution, devmem2 is from user space. But some of the registers we can not access from user space, those registers can be accessed from supervisor mode. Some register we can not access if module clock is not enabled.

    Can you dump the error message what are you getting while doing the register write. And also can you tell me which registers you are accessing?

    Regards
    AnilKumar

    Please mark this Forum post as answered via the Verify Answer button below if it helps answer your question.  Thanks!

  • 0 in reply to Anil
    Intellectual 560 points

    Hi Ani,

       Following are printout for write and read register, as you can see, some register can not access, the value we write into never worked. 

    vpif_sd_display entry

     

    VPIF_DMA_SIZE:

    Memory mapped at address 0x40020000.

    Value at address 0x1C21038 (0x40020038): 0x5 Written 0x20; readback 0x5

     

    VPIF_EMU_CTRL:

    Memory mapped at address 0x40020000.

    Value at address 0x1C21034 (0x40020034): 0x106 Written 0x1; readback 0x106

     

    VPIF_CHCTRL2:

    Memory mapped at address 0x40020000.

    Value at address 0x1C2100C (0x4002000c): 0x1E Written 0x0; readback 0x0

    FLD0_Y_STRTADR:

    Memory mapped at address 0x40020000.

    Value at address 0x1C210C0 (0x400200c0): 0x0 Written 0x0; readback 0x0

     

    FLD1_Y_STRTADR:

    Memory mapped at address 0x40020000.

    Value at address 0x1C210C4 (0x400200c4): 0x0 Written 0x0; readback 0x0

     

    FLD0_C_STRTADR:

    Memory mapped at address 0x40020000.

    Value at address 0x1C210C8 (0x400200c8): 0x0 Written 0x0; readback 0x0

     

    FLD1_C_STRTADR:

    Memory mapped at address 0x40020000.

    Value at address 0x1C210CC (0x400200cc): 0x0 Written 0x0; readback 0x0

     

    IMG_LINE_OFFSET:

    Memory mapped at address 0x40020000.

    Value at address 0x1C210E4 (0x400200e4): 0x3 Written 0x0; readback 0x0

     

    HSIZE_CFG:

    Memory mapped at address 0x40020000.

    Value at address 0x1C210EC (0x400200ec): 0x0 Written 0x0; readback 0x0

     

    VSIZE_CFG0:

    Memory mapped at address 0x40020000.

    Value at address 0x1C210F0 (0x400200f0): 0x0 Written 0x0; readback 0x0

     

    VSIZE_CFG1:

    Memory mapped at address 0x40020000.

    Value at address 0x1C210F4 (0x400200f4): 0x0 Written 0x0; readback 0x0

     

    VSIZE_CFG2:

    Memory mapped at address 0x40020000.

    Value at address 0x1C210F8 (0x400200f8): 0x0 Written 0x0; readback 0x0

     

    VSIZE_CFG3:

    Memory mapped at address 0x40020000.

    Value at address 0x1C210FC (0x400200fc): 0x0 Written 0x0; readback 0x0

     

    VPIF_INTEN &= ~VPIF_INT_CH2:

    Memory mapped at address 0x40020000.

    devmem_and: Value at address 0x1C21020 (0x40020020): 0x0 Value ANDed 0x0 Written 0x0; readback 0x0 Memory mapped at address 0x40020000.

    devmem_and: Value at address 0x1C1206C (0x4002006c): 0x0 Value ANDed 0x0 Written 0x0; readback 0x0 Memory mapped at address 0x40020000.

    devmem_and: Value at address 0x1C12038 (0x40020038): 0x0 Value ANDed 0x0 Written 0x0; readback 0x0 Value at address 0x1C12038 (0x40020038): 0x0 Value ORed 0x300 Written 0x300; readback 0x100

     

     

    ************

     

    FLD0_Y_STRTADR bt656NtscYT

    Memory mapped at address 0x40020000.

    Value at address 0x1C210C0 (0x400200c0): 0x0 Written 0xC2138; readback 0x0

     

    FLD1_Y_STRTADR bt656NtscYB

    Memory mapped at address 0x40020000.

    Value at address 0x1C210C4 (0x400200c4): 0x0 Written 0x142BF8; readback 0x0

     

    FLD0_C_STRTADR bt656NtscCT

    Memory mapped at address 0x40020000.

    Value at address 0x1C210C8 (0x400200c8): 0x0 Written 0x16838; readback 0x0

     

    FLD1_C_STRTADR bt656NtscCB

    Memory mapped at address 0x40020000.

    Value at address 0x1C210CC (0x400200cc): 0x0 Written 0xECF78; readback 0x0

     

    VPIF_CHCTRL2 configure

    Memory mapped at address 0x40020000.

    Value at address 0x1C2100C (0x4002000c): 0x0 Written 0x448; readback 0x448

     

    IMG_LINE_OFFSET configure

    Memory mapped at address 0x40020000.

    Value at address 0x1C210E4 (0x400200e4): 0x0 Written 0x2D0; readback 0x0 HSIZE_CFG configure Memory mapped at address 0x40020000.

    Value at address 0x1C210EC (0x400200ec): 0x0 Written 0x10C05A0; readback 0x0

     

    VSIZE_CFG0 configure

    Memory mapped at address 0x40020000.

    Value at address 0x1C210F0 (0x400200f0): 0x0 Written 0x40014; readback 0x0

     

    VSIZE_CFG1 configure

    Memory mapped at address 0x40020000.

    Value at address 0x1C210F4 (0x400200f4): 0x0 Written 0x108010A; readback 0x0

     

    VSIZE_CFG2 configure

    Memory mapped at address 0x40020000.

    Value at address 0x1C210F8 (0x400200f8): 0x0 Written 0x11B0001; readback 0x0

     

    VSIZE_CFG3 configure

    Memory mapped at address 0x40020000.

    Value at address 0x1C210FC (0x400200fc): 0x0 Written 0x20D; readback 0x0

     

    VPIF_INTEN configure

    Value at address 0x1C21020 (0x40020020): 0x0 Value ORed 0x4 Written 0x4; readback 0x4

     

    VPIF_INTENSET configure

    Value at address 0x1C21024 (0x40020024): 0x220 Value ORed 0x224 Written 0x224; readback 0x224

     

    VPIF_INTENCLR configure

    Value at address 0x1C21028 (0x40020028): 0x0 Value ORed 0x4 Written 0x4; readback 0x0

     

    Wait for Channel 0/1 frame sync configure Memory mapped at address 0x40020000.

    Value at address 0x1C21028 (0x40020028): 0x0 Written 0x3; readback 0x0 Value at address 0x1C21020 (0x40020020): 0x4

     

    VPIF_CHCTRL2 start

    Value at address 0x1C2100C (0x4002000c): 0x448 Value ORed 0x44B Written 0x44B; readback 0x44B vpif_sd_display entry

  • 0 in reply to jim xu
    TI__Expert 6655 points

    Hi Jim,

    From the log we can say that some of the registers are not accessed from devmem tool, means those can be change in supervisor mode.

    Better modify those registers from kernel.

    Regards
    AnilKumar

    Please mark this Forum post as answered via the Verify Answer button below if it helps answer your question.  Thanks!

  • 0 in reply to Anil
    Intellectual 560 points

    I have identified the problem to setup the video register in Linux, but the DM6467 still no video output, what is the proper steps to setup video output register for DM6467?