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Reg ITNTC, 0,1,2 Modules...

HSMTI
Prodigy 60 points

HI,

I need some clarity on INTC definitions in various documents. 
1. I understand the core-pac interrupt controller (register base at 0x01800000). So I have used it and also got event combiner working for me. (SPRUGW0B/ 9-3) No issues.
2. On the cjip level controller I am not able to say for sure, (register base @0x0260 0000) what to use. If I look at INTC users guide (SPRUGW4/ 2-2), it explains several thousand registers which are different from the ones specified in the spec data sheet (SPRS688C/ 159). When I look at the header files, and example code using definitions, they have fairly different register combinations. Please check Cslr_cpintc.h (e:\ti.sw\pdk6618\packages\ti\csl\Cslr_cpintc.h). I am thoroughly confused about what to use in the EVM or for that matter simulator. Do you have any updated information. I presume, SPRS688C.PDF is the latest one and should be used. But it lacks registers explanation. 
HSMTI...
  • 0
    TI__Genius 12065 points

    The chip-level interrupt controller is a common module across lots of TI devices. And it could be tailed for that specific device.

    The differences of the three documents could be as follows:

    1.cslr_cpintc.h: the CSL header file includes all the registers in the scope of chip-level interrupt controller itself. It has the coverage of all the registers of the common chip-level interrupt controller.  But some registers like Nest, Priority, Vector registers, are NOT supported on all the devices.

    2. C66x chip-level interrupt controller User Guide: the user guide is common for the same device family (C66x KeyStone Architecture devices). It lists all the registers supported in this device family, while it could mark some registers as Reserved if they are not supported in any of the device in this family.

    3. Chip-level interrupt controller table in the Data Manual: the table in the data manual only lists the registers are supported in this specific device. All the other registers that not supported in this specific device will not be listed. 

    The registers might be tailed for different documents, but the offset and functions for the same register should be the same across different documentation.

    I think you can start from the device data manual for the register base address and offset reference, since you do not need to care the other registers that are not supported in this device.

    If you want more information of the descriptions, you could refer to the user's guide.

    And if you want to use the CSL, you could include the header files and library and use those functional APIs without worrying about the registers. The APIs will pick up the correct registers to be programmed if you give the correct interrupt event number or other info based on the device data manual.

    Hope it helps and let us know if you have more questions.

    Sincerely,

    Steven