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C5505 Interrupts Priority

Mato Hattori
Prodigy 150 points

Hello,

I have a question regarding C5505 Interrupts Priority.

According to the datasheet, INT0 interrupt has higher priority than TMR0 interrupt.

However, I'm observing INT0 interrupts are missed while processing TMR0 interrupt service routine.

I'm writing interrupt service routine in C language.

What is necesssary to enable INT0 interrupts to occur during the TMR0 interrupt service routine?

Thanks for your attention.

 

  • 0
    Prodigy 30 points

    Hi, 

    I am sorry to bring this old post, but I am in the same problem. Could someone more experienced confirm that:

    - The behavior described is the normal one (when you are in an interrupt service routine, by default all the interrupts are disabled, even those ones of higher priority). Right?

    - How could I solve it? Re-enable the interrupts of higher priority within the current service routine?

    Thank you for the help ;)

  • 0 in reply to Pablo Faraday
    Prodigy 150 points

    Thank you bringing this *OLD* issue up again.

    The answer I got from a feild engineer @ TI Japan is that nesting of interrupts is not supported by any TI DSP's.

    However, if that is true, what does interrupt priority exist for?

    Please someone give us a clear answer.  Thank you in advance.