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6678 clock input

guoping Lee
Expert 1010 points

Hi everyone.the Hyperlink and PCIE are not required in my project.Does that mean the Clock input for Hyperlink and PCIe will be like this?

  • 0
    TI__Mastermind 42545 points

    That is correct.  The P pin should be connected to the core voltage and the N pin should be tied to ground through a 1K resistor.  Note that the if a clock is not provided to the PCIE subsystem the PCIESSEN configuration pin should be pulled low at the rising edge of RESETFULLz to ensure that the PCIE subsystem is disabled.