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AM3703 working with a cstn display

Other Parts Discussed in Thread: AM3703, DM3730

Has anyone else had any success getting a cstn/passive display to work with an omap37xx (am3703/dm3730)? I have used a different micro-controller that works with the same cstn display as an example.

In trying to get this to work I have found that the final line in a frame doesn't send out clock and data. I have tried to eliminate this by setting the vsync width to zero but this doesn't work. On an older cpu board that we have based on a freescale processor it doesn't send out this last line with the clock and data at zero.

  • Can you please provide an update for when this request will be addressed?

    Regards,

    Tim

     

  • Here are some further details

    - Changed clk: went down to ~750K (currently @ ~2.4 Mhz); only effective change was refresh rate was slowed.
    - Different front, back, top bottom margin's: I can see the change on the scope but no real effect on the lcd itself.
    - Tried to migrate from 16-bit rgb to 8-bit clut but could not get the lcd controller to drive the data at that setting. Current setting is still 16-bit rgb.

    Datasheet for the display can be found here

    Current status:
    Currently the display is driven 2 different ways. Method 1, is via the omap on board lcd controller. Method 2 is bit-banging the lcd control signals. The current test is a black background; sending out first and last columns of red. What actually shows on the display differs from what it should show. The first column in both cases shows as column 2 on the lcd. The last column will not display on the actual lcd.

    So, I changed in both cases the last column to be the second to the last (319). The results differ here between the bit-bang and the on board lcd controller. The bit bang column based at r319 (also same for g319 and b319) does show, it appears on the lcd as the last column. When using the on board lcd controller (column r319), it will not show on the lcd.

    Current omap register settings:
       clken:(0x48004d00)0x00370037
      fclken:(0x48004e00)0x00000005
      iclken:(0x48004e10)0x00000001
      idlest:(0x48004e20)0x00000000
    autoidle:(0x48004e30)0x00000000
      clksel:(0x48004e40)0x00001009
     sys-cfg:(0x48050010)0x00000001
     dss-ctl:(0x48050040)0x00000000
     dss-clk:(0x4805005c)0x00000081
     control:(0x48050440)0x60018303
      config:(0x48050444)0x00000000
    timing_h:(0x48050464)0x00000000
    timing_v:(0x48050468)0x00000000
    pol_freq:(0x4805046c)0x00000000
     divisor:(0x48050470)0x0004000a
    lcd-size:(0x4805047c)0x00ef013f
    gfx-size:(0x4805048c)0x00ef013f
    gfx-attr:(0x480504a0)0x0000008d

    Craig