C6747 EDMA interrupt: ISTP value not update, even IER, CSR enable interrupt, why?

Here is the asm and cmd file.in my project, without BIOS in use.

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asm file start

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; Global symbols defined here and exported out of this file
   .global _intcVectorTable
   .global _c_int00
   .global _vector1
   .global _vector2
   .global _vector3
   .global _vector4
   .global _vector5
   .global _vector6
   .global _vector7
   .global _edma_isr
   .global _vector9
   .global _vector10
   .global _vector11

; some symbols defined in other files.
; since there is .global for below items, maybe no need to add .ref ?
   .ref    _c_int00

; This is a macro that instantiates one entry in the interrupt service table.
VEC_ENTRY .macro addr
    STW   B0,*--B15
    MVKL  addr,B0
    MVKH  addr,B0
    B     B0
    LDW   *B15++,B0
    NOP   2
    NOP
    NOP
   .endm

; This is a dummy interrupt service routine used to initialize the IST.
_vec_dummy:
  B    B3
  NOP  5

; This is the actual interrupt service table (IST).
 .sect ".vecs"
 .align 1024

_intcVectorTable:
_vector0:   VEC_ENTRY _c_int00      ;RESET
_vector1:   VEC_ENTRY _vec_dummy    ;NMI
_vector2:   VEC_ENTRY _vec_dummy    ;RSVD
_vector3:   VEC_ENTRY _vec_dummy    ;RSVD
_vector4:   VEC_ENTRY _vec_dummy  ;Interrupt4 ISR
_vector5:   VEC_ENTRY _vec_dummy
_vector6:   VEC_ENTRY _vec_dummy
_vector7:   VEC_ENTRY _vec_dummy
_vector8:   VEC_ENTRY _edma_isr		;Interrupt8 EDMA INT ISR
_vector9:   VEC_ENTRY _vec_dummy
_vector10:  VEC_ENTRY _vec_dummy
_vector11:  VEC_ENTRY _vec_dummy


;* =============================================================================
;*   Automated Revision Information
;*   Changed: $Date: 2007-09-11 11:05:40 -0500 (Tue, 11 Sep 2007) $
;*   Revision: $Revision: 3960 $
;* =============================================================================

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asm file end

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cmd file start

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-l rts64plus.lib

-l ..\..\lib\c6747bsl_lzt.lib // lib modified from evmc6747bsl.lib.

-stack           0x00000800      /* Stack Size */
-heap            0x00000800      /* Heap Size */

MEMORY
{

	VECS:		 o = 0x11800000  l = 0x00000400 /**/
    DSPL2RAM:    o = 0x11800400  l = 0x0003FC00 /* L2 RAM */
    SHAREDRAM:   o = 0x80000000  l = 0x00020000
    SDRAM:       o = 0xC0000000  l = 0x20000000
}

SECTIONS
{
    .vecs		>	VECS
    .bss        >   SHAREDRAM
    .cinit      >   SHAREDRAM
    .cio        >   SHAREDRAM
    .const      >   SHAREDRAM
    .stack      >   SHAREDRAM
    .sysmem     >   SHAREDRAM
    .text       >   SHAREDRAM
    .switch     >   SHAREDRAM
    .far        >   SHAREDRAM
}

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cmd file end

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main file start

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/*
 *  Copyright 2008 by Spectrum Digital Incorporated.
 *  All rights reserved. Property of Spectrum Digital Incorporated.
 */

#include "stdio.h"
#include "evmc6747.h"
#include "c6747_edma.h"

int isr_cnt = 0;
int loop = 0;
interrupt void edma_isr();

extern CSL_Edma3ccRegsOvly edmaCcRegs;
extern void intcVectorTable (void);            

//lztao:	When you use the cregister keyword on an object, the compiler compares the name of the object to a list
//			of standard control registers for the C6000 (see Table 6-4). If the name matches, the compiler generates
//			the code to reference the control register. If the name does not match, the compiler issues an error.
//			TMS320C6000 Optimizing Compilerv 7.0 User's Guide.pdf
extern cregister volatile unsigned int    ICR;    // interrupt clear register
extern cregister volatile unsigned int    IER;    // interrupt enable register
extern cregister volatile unsigned int    CSR;		// Control Status Register
extern cregister volatile unsigned int    IFR;		// Interrupt Flag Register
extern cregister volatile unsigned int    ISTP;		// Interrupt Service Table Register

/* ------------------------------------------------------------------------ *
 *                                                                          *
 *  Testing Function                                                        *
 *                                                                          *
 * ------------------------------------------------------------------------ */
void EDMA_TEST()
{
	// prepare data in SDRAM
	Uint16 i;
	Uint16 j = 1;
	Uint16 *tmp_ADDR;
	int mask;

	for(i=0;i<80;i++)
	{
		
		tmp_ADDR = (Uint16 *)(SDRAM_START_ADDR + 2*i);
		*tmp_ADDR = j++;

	}

	// trigger the EDMA transfer A-type.
    mask = 1 << EDMA_GPIO4_CH;
    edmaCcRegs->ESR = mask;

}



/* ------------------------------------------------------------------------ *
 *                                                                          *
 *  main( )                                                                 *
 *                                                                          *
 * ------------------------------------------------------------------------ */
void main( void )
{
    /* Initialize BSL */
   	C6747_init( );
	
	c6747_edma_config();

    // enable interrupts
	   ISTP = (unsigned int)intcVectorTable; // let system know the interrupt vector table address 
 	   ICR  = (1 << 8);         // clear INT8 (precaution)
 	   IER |= (1 << 8);         // enable INT8 as CPU interrupt 
	   CSR |= 0x00000001; 		// enable global Interrupt

    EDMA_TEST();

    printf( "\n***ALL Tests Passed***\n" );

	while (1)
	{
		loop++;
	}
    //SW_BREAKPOINT;
}



/*=====================================
 *
 *		EDMA_ISR
 *		_EDMA_ISR
 *=====================================*/
interrupt void edma_isr(void)
{
	isr_cnt++ ;
	
//	printf("edma isr done.");

	// when isr_count = 10, trigger SEM to release related task to go
	
}

/*
void edma3ccIsr()
{
    while(edmaCcRegs->ipr)
    {
        if (edmaCcRegs->ipr & (1 << EDMA_RCV_PING_TCC))    // receive channel (ping)
        {
            EdmaIntClear(EDMA_RCV_PING_TCC);
            SEM_post(&rcv_ping_sem);
            //LOG_printf(&trace, "[ISR]: receive ping!");
        }

        if (edmaCcRegs->ipr & (1 << EDMA_RCV_PONG_TCC))    // receive channel (pong)
        {
            EdmaIntClear(EDMA_RCV_PONG_TCC);
            SEM_post(&rcv_pong_sem);
            //LOG_printf(&trace, "[ISR]: receive pong!");
        }

        if (edmaCcRegs->ipr & (1 << EDMA_XMT_PING_TCC))    // transmit channel (ping)
        {
            EdmaIntClear(EDMA_XMT_PING_TCC);
            SEM_post(&xmt_ping_sem);
            //LOG_printf(&trace, "[ISR]: transmit ping!");
        }

        if (edmaCcRegs->ipr & (1 << EDMA_XMT_PONG_TCC))    // transmit channel (pong)
        {
            EdmaIntClear(EDMA_XMT_PONG_TCC);
            SEM_post(&xmt_pong_sem);
            //LOG_printf(&trace, "[ISR]: transmit pong!");
        }
    }

    return;
}
*/

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main file end

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Finally, i figure out the problem.

It is related to the IER.NMIE, it should be set as 1.

IER |= 0x00000003

Hi. liang.

I try to realize EDMA interrupt (c6748) and found your post.

It's very helpful to me but I have some problems.

I check my CPU register, but IFR has always "0".

It doesn't change, also ISTP too.

But, EDMA ISR function & register work well.

I have a same vector.asm file you have, and set cpu register below.

#define EVTSET0  *((volatile unsigned int *)(0x01800020))

#define INTMUX2  *((volatile unsigned int *)(0x01800108))

EVTSET0 |= (1 << 8); // EDMA TCC EVT 8 set
INTMUX2 |= (8 << 0);

ISTP = (unsigned int)(intcVectorTable);
ICR = (1 << 8); // EVT 8 clear
IER |= (1 << 1); // NMI enable
IER |= (1 << 8); // EVT 8 enable
CSR |= (1 << 0); // GIE enable

You don't use EVTSET0, INTMUX2 control register in your code,

If I use vector.asm file, they need not to be used?

regards,

woo.

Hi, woo.

if your ISR work well, that means DSP already catched the EVT8, and IFR is supposed to show that event.

Please run step by step to check the IFR status. If not this reason , i am sorry i have no idea.

but you can check one by one according to the signal flow.

For the EVTSET0, INTMUX2, maybe there is a default value, you can check in datasheet. 

ZT

Hi liang.

I got a problem about McBSP & EDMA debugging in silicon real-time mode in ccs.

I want to see infinite EDMA loop (same Param2) and ISR function call using TCC & Event Trigger (by EDMA Int8)

But It works just one time (ISR function called only one time).

Please let me know how can I solve it.

here is my EDMA & ISR function code.

// ======================================================

// EDMA function

// ======================================================

void EDMA_Initial(void){

EMCR = 0xFFFFFFFF; // Event missed clear register
QEMCR = 0xFFFFFFFF; // QDMA Event missed clear register
CCERRCLR = 0xFFFFFFFF; // Error clear register
DRAE1 = 0x00000004; // Enable DMA Channel to Shadow region
DMAQNUM0 |= (0 << 8); // E2 in queued on Q0
CCSTAT = 0x00000000; // Status register clear

ECR1 = 0xFFFFFFFF; // Event clear register
EECR1 = 0xFFFFFFFF; // Event enable clear register
SECR1 = 0xFFFFFFFF; // Secondary event clear register

USTIMER_delay(5);

OPT2 = (0 << 23 | // ITCCHEN Intermediate transfer completion chaining enable
0 << 22 | // TCCHEN Transfer complete chaining is enabled
0 << 21 | // ITCINTEN Intermediate transfer completion interrupt is enable
1 << 20 | // TCINTEN Transfer complete interrupt enable
2 << 12 | // TCC Transfer complete code (channel 2)
0 << 11 | // TCCMODE Normal completion
0 << 2 ); // SYNCDIM A-synchronized

SRC2 = 0x01D10000; // Channel source address (McBSP DRR)

A_B_CNT2 = ((range_num*scan_num) << 16 | // BCNT number of arrays in 1 frame
4 << 0 ); // ACNT bytes in array / 1st dimension

DST2 = (uint32_t)tempRX;

SRC_DST_BIDX2 = (4 << 16 | // Destination B index = same ACNT
0 << 0 ); // Source B index 

LINK_BCNTRLD2 = (0 << 16 | // B count reload
65535 << 0 ); // Link address (null)

SRC_DST_CIDX2 = (0 << 16 | // Destination C index
0 << 0 ); // Source C index

CCNT2 = (0 << 16 | // reserve
1 << 0 ); // C counter number of frames

EESR1 = 0x00000004; // channel & param 2

IESR1 = 0x00000004; // Interrupt Enable Set Register (channel 2)
}

// ======================================================

// ISR function

// ======================================================

interrupt void EDMA_ISR(void)

{

printf(" EDMA_ISR test START !!!!!! \n");

ICR1  = 0x00000004;     // Interrupt Clear Register

}

I got a result that printf function is called only one time.

Best Regards.

Woo.

Hi, Woo,

Pls check  TCCHEN function in datasheet, it should be the key factor for your problem.

Hi liang.

I'm using ADC & McBSP, so I don't use TCCHEN and want to trigger EDMA by using McBSP receive event.

(McBSP event => EDMA start => ISR start => EDMA restart .... )

Do you know about mapping McBSP receive event to EDMA event trigger?

Thanks.

Hi liang and sung

where do you attach your asm file?
actually I'm trying to configure interrupt for Rx UART
but I don't know how to configure or enable the interrupt register in C6747
can you give me a hint for that?
where I should  write the code for configuring the interrupt?

please I need your help