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DSP/LINK memory mapping

Other Parts Discussed in Thread: OMAPL138

Hi all,

We use Omapl138 processor with CCSV5 where i need the answer for the following:

How to do memory mapping for bios component?

How to configure IRAM completely to L2 cache?

How to do memory mapping for link components and libraries in DSP?

could somebody help me out....

with regards,

Anu