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Problems with AM35x IBIS model for DDR2 Hyperlynx simulation

Gary Cochran
Intellectual 295 points
Other Parts Discussed in Thread: AM3505

We are finishing up layout on the TI Sitara board and having problems with the DDR2 Hyperlynx simulation. Using the Micron MT47H64M16HR x16 DDR2's, -25E speedgrade. This should be plenty good, since we are clocking at 166MHz.

We followed the AM3505 DDR2 layout recommendations in the Datasheet. I am getting some strange behavior in HyperLynx.

The problems are likely with the IBIS model (am35xxzer, sprm504, Version 4.1, May10,2010)

1) When I do an IBIS check, there are several warnings (about 179) relating to non-monotonic signals. The header in the IBIS file says to ignore these... but it does affect my simulation results.

2) The IBIS model does not have any reference to the [DIFF PIN] signals, which makes the simulation choke.I added definitions, but they do not have all the threshold information.

3) The ODT is behavior for the AM3505 is not documented anywhere... I assume ODT is inside the part, as it isimportant for read cycles. The IBIS model does not have ODT characteristics built in, so I can't simulate a DDR2 read cycle.

Does TI have an updated IBIS model that has DIFF PINS, ODT characteristics ?

Is there someone at TI that has setup HyperLynx simulation for DDR2?

  • 0
    Prodigy 40 points

    Gary- thanks for posting this for me..... found the answer to #3 in an eariler post. HyperLynx DDRx runs read cycle (write cycle was already running before).

    --------------------- Posted by Jeff C. 13 Jun 2011-------------------------

    The ibis model shows 6 options for the SDRC interface when configured as an input.  Which one should be used for simulations or how can I tell which one is active?

    |*****************************************************************************************
    |     Usage IO#1.8V#FULL_SSTL/HALF_SSTL/NONE_SSTL#FAST#BSSTL18TCSCGPBFZ_7LM.PAD
    |     Base model BSSTL18TCSCGPBFZ_7LM
    |*****************************************************************************************
    [Model Selector] Selector_16
    Model_100 INPUT,1.8V,HALF_SSTL,+-10%V
    Model_102 3-STATE,1.8V,PI,FAST,+-10%V
    Model_104 INPUT,1.8V,FULL_SSTL,+-10%V
    Model_107 INPUT,1.8V,NONE_SSTL,+-10%V
    Model_113 INPUT,1.8V,HALF_SSTL,+-0.1V
    Model_115 3-STATE,1.8V,PI,FAST,+-0.1V
    Model_117 INPUT,1.8V,FULL_SSTL,+-0.1V
    Model_120 INPUT,1.8V,NONE_SSTL,+-0.1V

    You need to select the correct model for your simulation.  There are 6 different options for input.  The last value signifies the power supply tolerance that you designed in your system.  If you designed the 1.8V supply within +-10% then you need to use the first set of models and if you design is designed to +-0.1v then you need to use the second set.  After that, you choose the one based on how you have the termination set, full, half, or none.