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GMII clock (GMTCLK pin) doesn't work on DM8148.

Hi All,

I have interesting issues on the custom DM8148 board.  Basically, the custom board has 1 PHY(KSZ9021GN) and 1 switch(Marvell 88e6122) for interface of other processors and video source. The GMII is used for the interface with PHY.

The issues are on each PHY/switch interface. First one occurs on Gigabit KSZ9021 PHY chip. It only works with 100Mbps and doesn't work with Gbps network, even though the Gigabit link is established. The dual MAC patch has been applied and it is first ethernet device (eth0). Also interesting thing is that only 25MHz clock is measured on GMTCLK and MTCLK and they are provided by DM8148. 

The other is NO CLK (GMTCLK and MTCLK) present, even though Marvell switch gives 125MHZ clock to DM8148. I have checked out Ethernet Mac Sliver (CPGMAC_SL),  GMII_EN and pinmux registers and they look fine. When a cable is plugged in, both side PHY - DM8148 EVM and built-in PHY on Marvell 88e6122 detect each other.  The ethernet interfaces on the custom board look like below.

DM8148 -+------ EMAC (0) ---- KSZ9021 PHY  : working on 100Mbps only and it detects peer PHY for 1000/100Mbps

                |

               +------- Marvell 88E6122 built-in PHY : not working at all and it detects peer PHY for 1000/100Mbps

Any suggestion or idea ?

Best Regards,

SK

  • Hi All,

    Anybody knows what happens on GMII. To scope down, I started with 1st PHY to resolve the issue - no Gbps connection. The test code which I have been using is BB_091_rgmii_emac_0 from Mistral as a verification tool for DM8148 EVM, but it doens't work on the EVM board.  It is stuck at "waiting for link" and the link is never established. So I changed code a little bit to make it run on GMII interface. It seems working but not 100% and just 60%, even though EMAC loopback is set. I'm really confused whether or not my testing is correct because I haven't had 100% success on EMAC loopback like the 2nd bit is set to '1' on CPGMAC_SL1 MAC Control Register (P1371, TRM).

    I don't have any idea regarding how to test the GMII. Any suggestion and idea will be helpful.

    Best Regards,

    SK

  • Hi SK:
    Any luck with detecting this clock. I am trying to bring up a custom DM8168 board and

    am running into the ame problem of not seeing the GMTCLK  and I did make sure that

    the GEL file is enabling the SYSCLK24.  I am using GMII. Any response will be appreciated.

    Thanks

    -srini-

  • Hi Srinvivasan,

    Unfortunately,  I haven't get GbE working on my custom board as you have so far. I and H/W developer checked all GMII interface in detail using scope but nothing suspicious except for ugly Tx/Rx pulse. It should not be the reason according to H/W developer.  Basically, since GbE is one of nice feature, I stopped debugging it. So far what I doubt is GMII interface on DM8148 becuase EVM has RGMII interface but I'm not sure.

    Sorry I couldn't help you and good luck.

    SK.

  • Hy guys i don't know if you had solved your problem with Gigabit connectivity, but i can spare a suggestion that seem to had solved  the same problem you describe on your post on my custom board.

    Look for CPGMAC_SLx MAC control register and set to 1 the field named GIG_FORCE.

    In this way DM8148 MAc sources the GMII clock toward the PHYusing GMTCLK pin.

  • Hi All,    

    Board configuration  :- (CPSW + Marvell switch 88E6085). 
     

    EMAC 0----> connects on PHY-->KSZ9031 works 100Mbps  & random behavior on 1G

     /* setup RMII_REFCLK  */
      __raw_writel(0x4 ,RMII_REFCLK_SRC);

    EMAC 1 ----->Marvell switch detected. ifconfig -a only eth0,eth1 detected not other switch ports created .
    CPSW code wrong communicate with Marvell switch .Any changes in CPSW driver for Switch??     

    Thank You,
    Tejas.