Hi all,
I have one question concerning the input clocks to the TI C6672 DSP. In our design we use one CDCE62005 to generate all necessary clocks. My first idea was to use the
same frequencies as used on the TI C6678 Evaluation Board which are:
CDCE62005 input frequency is 25 MHz
DDR_CLK = 66.67 MHz
PCI_CLK = 100 MHz
SGMII_CLK = 312.5MHz
Core_CLK = 100 MHZ
Now I found out that the CDCE62005 cannot generate this frequency configutation, Advantech I think uses 2 of the CDCE 62005 to solve this.
My question is now if the following input frequency which could be generated by the CDCE62005 will work with the DSP
DDR_CLK = 200 MHz
PCI_CLK = 100 MHz
SGMII_CLK = 250MHz
CoreCLK = 100 MHz
Thx for your help