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IPC

RAHUL SHARMA91013
Intellectual 375 points

Hi 

I want to change my  Message queue implementation from Shared mem to QMSS.

Would it be helpful in reducing latency ?

I would be interested in using QMSS Qpend queues for this purpose which i think would be faster than ACCUMULATOR.

Can somebody tell me about the documentation of this particular implementation.

I am using MCSDK 2.00.3.15 ,CCS 5.1.1.00031

Regards

Rahul 

  • 0
    TI__Expert 4920 points

    Hi Rahul

    You can find the benchmarks at http://processors.wiki.ti.com/index.php/BIOS_MCSDK_2.0_User_Guide#IPC_Benchmarks

    As the benchmarks tell, yes you should see an improvement in using QMSS v/s Shared Memory, and QPEND would be faster than Accumulator mode.

    The architecture and implementation details can also be found on the same wiki page at the links below:
    http://processors.wiki.ti.com/index.php/BIOS_MCSDK_2.0_User_Guide#QMSS_IPC_Transport
    http://processors.wiki.ti.com/index.php/BIOS_MCSDK_2.0_User_Guide#Using_and_Configuring_the_Navigator.2FQMSS_Transport

    In addition, you can find an implementation example at "pdk_C6678_1_0_x_xx\packages\ti\transport\ipc\examples" that has code that benchmarks both the QMSS and SharedMemory approaches.

  • 0 in reply to Uday
    TI__Mastermind 23525 points

    In addition to Uday's comments, please update to the latest MCSDK, as the one you are using is very old.

    http://software-dl.ti.com/sdoemb/sdoemb_public_sw/bios_mcsdk/latest/index_FDS.html

    Regards,

    Travis