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PLL Comes Up in PLL Mode Instead of Bypass on C6678

Josh King
Prodigy 190 points

Hello,

I am working on a custom board using the C6678 and after a power-on reset, the device comes up in PLL mode with PLLM=63 and PLLD=24. Based on the Bypass Mode section (2.4) in the PLL Controller User Guide (sprugv2c), I am under the assumption that the device should be in Bypass mode by default after the initial power up.

I am trying to configure the PLLM and PLLD values to 31 and 4 respectively to acheive a core clock frequency of 1000MHz with a CLKIN of 312.5MHz. When I execute the Set_Pll1() function from the EVM GEL file using the new PLLM and PLLD values, I get an error from the emulator as soon as PLL mode is enabled. The error indicates that the functional clock is off. I have confirmed that there is no clock signal using an oscilloscope on the SYSCLKOUT pin.

If the PLL is already being configured in PLL mode during startup, would this prevent the PLL from being reconfigured with the correct multiplier and divider values? Is there any reason that the PLL should not start up in Bypass mode? Please let me know if there is any other information that I can provide in order to determine the cause of this problem.

 

Thanks,

Josh King

  • 0
    TI__Mastermind 30825 points

    The bootrom will initialize the main PLL.  Please see section 2.5 of the Data Manual.  You'll want to have the bootmode pins 12:10 set to 0x110b as per table 2-13 in the data manual.  The exception would be in the case of an I2C boot (which is required for PG1.0 Si, for the PLL issue workaround - see the errata for details.)  In which case you'll want your IBL configured to set the correct PLL values for you.

    Best Regards,

    Chad

  • 0 in reply to Chad Courtney
    Prodigy 190 points

    Hi Chad,

    Thank you for the information. The bootmode pins 12:10 were already set to 0x110b as you suggested. I am already getting an 800MHz clock for SYSCLK1 and based on the information in table 2-13 it seems that the bootrom is initializing the PLLs for an 800MHz device.

    Is there a reason that the bootrom would not recognize the device as capable of a 1000MHz clock? Do I need to configure the IBL in order to set up the correct PLLM and PLLD values?

    Thanks,

    Josh

  • 0 in reply to Josh King
    TI__Mastermind 30825 points

    Josh,

    Which revision of the device do you have? Is it TMS or TMX Silicon?

    It sounds like you're doing I2C boot, in which case it the bootrom defaults to a sufficiently low setting (for max input clock and low operating speed of the device) to get the initial data from the I2C ROM which then should be programmed to change the clocks.  You will need to configure the IBL in order to set up the correct PLLM and PLLD values if you're using I2C boot. 

    Best Regards,

    Chad

  • 0 in reply to Chad Courtney
    Prodigy 190 points

    Hi Chad,

    We are currently using the TMX revision of the device. The boot mode is currently configured for No Boot/Emulation. Is there any way to have the boot rom configure the PLLs for 1000MHz operation in this mode or is the only option to configure the device in I2C boot mode and use the IBL to set the correct PLLM and PLLD values?

    Thanks,

    Josh

  • 0 in reply to Josh King
    TI__Mastermind 30825 points

    Josh,

    TMS vs TMX is a status not the revision.  Is this PG 1.0 or PG 2.0 Si?

    PG 1.0 Requires the I2C Boot ROM be used because of PLL may not lock.  See the Errata Advisary 8

    That said the not all of the TMX units had the speed grade values e-fused onto the devices, in which case they default values is for 800MHz device.  You can change the PLL settings in your code after boot has completed if you want to.  It will not hurt the device to boot at 800MHz and later change to 1000MHz setting. 

    Please note that TMX units are early sample units and are not production units, all TMS units should have the speedgrade e-fused for the device.

    Best Regards,

    Chad

  • 0 in reply to Chad Courtney
    Intellectual 725 points

    Chad Courtney said:

    Josh,

    TMS vs TMX is a status not the revision.  Is this PG 1.0 or PG 2.0 Si?

    PG 1.0 Requires the I2C Boot ROM be used because of PLL may not lock.  See the Errata Advisary 8

    Is it  means i cannot boot the C6678 in my own board by SPI directly ?

    But there is no EEPROM in my Board , what can i do ?

  • 0 in reply to xi su
    TI__Mastermind 30825 points

    Xi,

    With PG2.0 devices you can boot directly to SPI.  Based on your earlier communications, it would appear you're only recently developing a board.  We have been shipping PG2.0 devices for most of this year and I'd suspect you have PG 2.0 Si. Please check your board.

    Best Regards,
    Chad

  • 0 in reply to Chad Courtney
    Intellectual 725 points

    Thank you for your reply !