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AM335x GPMC 8-bit external memory device - User manual discrepancy?

I'm trying to figure out whether the GPMC for the AM335x truly supports 8-bit external devices.  The interface would be to an external FPGA.

According to SPRUH73C, section 7.1.3.1, 8-bit non-multiplexed devices are supported.  Table 7-5 shows a pinmux option for it. 

This is what concerns me:

From SPRUH73C:

7.1.3.3.8.2.2 Access Size Adaptation and Device Width
Each chip-select can be independently configured through the GPMC_CONFIG1_i[13-12] DEVICESIZE
field to interface with a 16-bit wide device or an 8-bit wide device. System requests with data width greater
than the external device data bus width are split into successive accesses according to both the external
device data-bus width and little-endian data organization.
The device does not provide the A0 byte address line required for random-byte addressable 8-bit wide
device interfacing (for both multiplexed and nonmultiplexed protocol). It limits the use of 8-bit wide device
interfacing to byte-alias accesses. This limitation is not applicable to NAND device interfacing (8-bit wide
or 16-bit wide devices).

This seems to contradict table 7-5.  It's possible that I'm reading this wrong, or misinterpreting something, so it would be nice to check the words against a timing diagram showing 8-bit accesses to external memory.  The only timing diagrams in the manual are for 16-bit external devices.  As one could expect, A0 is not used.