Over here:
http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/181506.aspx
it was stated that:
DM8147 is capable of 2 1080p30 (encode or decode)
so,
it is possible to have
1 1080p30 encode
3 SD encodes
1 SD decodes
and
DM8165 can do double this in terms of video coding.
The datasheets and tech references for the 'DM8148 and 'DM8168 families specify hardware capabilities. In an application, software can create additional limitations.
Other activity that consumes memory or processor bandwidth might reduce these CODEC limits; they apply to the decoder capability, right? This is going to apply to any architecture with multiple high-performance processors and shared memory of limited bandwidth. Tradeoffs will need to be made, and the system will benefit from tuning in this case.
On the other hand, the software capability (particularly support for multiple streams/instances) can create hard limits that won't respond to tuning.
Using the current general distribution 5.03 EZSDK and available Gstreamer, V4L2, C6Accell, PSPs, etc. how may inputs, encodes/decodes, de-interlacers and CODECs are supported simultaneously, assuming nothing else is going on other than the control software for these tasks? For example:
How many VIP input instances are supported? is it four?
Can I multi-task a single de-interlacer to de-interlace more than one stream within it's bandwidth limitation, e.g. 4 SD streams?
Can I multi-task a CODEC within it's bandwidth limitations?
Can I input two SD streams through the VIP Port on separate inputs and de-interlace them both on a DM8148? What software would control the VIP port and de-interlacer?