Hello!
I use OMAP3530 processor.
Boot ROM code starts my program from NAND.
I read in ARM Technical Reference Manual that after reset the processor starts in
Supervisor mode and Secure state (that is NS bit in the CP15 SCR register is cleared).
This means that I can access all CP15 register (such as SCR, MVBAR etc.) that can be
accessed in Secure Privileged modes only.
But, when I try to Read SCR (Secure Configuration Register), for example, the processor hangs.
But if I try to Read the register, that can be read in both Secure or Non-Secure Privileged modes
(NSACR, VBAR etc.) this reading operation completes successfully.
The CP15 register read command is the first command of my program, that executes just
after the boot ROM code transfers control to my program. Please, see the following example:
1) If the first command of my program is:
MRC p15, #0, R0, c1, c1, #0
(Read the SCR) the program hangs.
2) If the first command of my program is:
MRC p15, #0, R0, c12, c0, #0
(Read the VBAR) the program works correctly and this command returns the
value 0x00014000 (that is the base address of the ROM exception vectors).
May be it is the boot ROM code sets the Non-Secure state? Could You help me
to understand why I can´t read secure CP15 registers, please.
Thanks in advance,
Ilya.