Hello :
Looking 4 Jeff to reply.cause I read the reply from Jeff about another question:
" Hello Thomas,
NAND devices are not memory mapped so you are not bounded by the GPMC's memory map space in the AM335x. The GPMC supports up to 16b ECC and 4K page size. so you can use a wide range of NAND devices."
My board is OMAP 3530 typed and from the pcb layout I find the nand device is conencted to the CS0
but the x-load nand_init()
__raw_writel((((OMAP34XX_GPMC_CS0_SIZE & 0xF) << 8) |
((OMAP34XX_GPMC_CS0_MAP >> 24) & 0x3F) |
(1 << 6)), (GPMC_CONFIG7 + GPMC_CONFIG_CS0));
#define OMAP34XX_GPMC_CS0_MAP NAND_BASE
# define NAND_BASE 0x30000000 /* NAND addr (actual size small port) */
If the coed in sram set the base address of GPMC to 0x3000 0000,will this cause the problem?
as what the Jeff said above,no need to care about the base address of NAND chip,is it correct?for the code in the x-load just to get access to the NAND by the command and data register,but the address of the base address.
if any advise please to tell me.and so appreciated about you reply.
thanks.