Other Parts Discussed in Thread: TMS320C6654
1. In table 7-2 on page 110 of the data sheet for TMS320C6654 it states in the row for "time stamp 6" that, "the maximum clock period is 33.33 nsec”...
a) Is this the maximum clock period during configuration? What are the clocking frequency requirements during configuration?
b) Is there a document that explains/outlines/provides this information?
2. In table 7-2 on page 110 of the data sheet for TMS320C6654 it states in the row for "time stamp 3" that, "All LVCMOS input and bidirectional pins must not be driven or pulled high until DVDD18 is present. Driving an input or bidirectional pin before DVDD18 is valid could cause damage to the device.”
a) Does this mean that all inputs have to be in a high impedance state? Or, can all inputs be set to the “low input state?”