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timer3 RTO and interrupts on dm365

Jan Pohanka
Expert 1310 points

Hello,

I would like to use RTO peripheral of a DM365 for the following issue - the short pulse on a gpio should reset a timer and rto sets one of its inputs to Hi level. After some time (timer equals its period) rto sets the input low again. As I understand the reference manuals this should be possible.

However I'm not able to generate events (interrupts) with timer3 when BW_COMPATIBLE bit is set on. In that case the interrupt is fired only once when the the timer overflows (in continuous setup). Writes to INTCTL_STAT register to clear the flag have no effect. When I unset BW_COMPATIBLE everything works as expected and interrupt is fired periodically on the overflow event.

could please someone give me any hint what am I missing?

regards
Jan 

  • 0
    TI__Expert 5170 points

    Hi,

    From the explanation I understand that when BW_COMPATIBLE bit is set, the timer3 module is generating an interrupt only when there is an overflow but not when there is an external event.

    To generate an interrupt in the case of external event, you should enable this interrupt by setting the EVT_INT_EN34 bit in INTCTL_STAT register. I assume you have done this, but can you please confirm this?

    Regards, Sudhakar

  • 0 in reply to Sudhakar Rajashekhara
    TI__Expert 5170 points

    Hi,

    Couple of more inputs on this:

    Event Capture Mode is available for Timer 3 only and only when Timer 3 is configured in 32-bit unchained mode. Also, Event Capture Mode is available only when the timer clock source is the internal timer (CLKSRC=0) and the timer is in continuous mode (ENAMODE=10 or 11). The external input event for the timer 1:2 side of the timer can come from either GPIO1 or GPIO2 pin. The external input event for the timer 3:4 side of the timer can come from either GPIO3 or GPIO4 pin. You can select either GPIO pin via the register TIMER64_CTL in the System Control module.

    Regards, Sudhakar

  • 0 in reply to Sudhakar Rajashekhara
    Expert 1310 points

    Dear Sudhakar,

    I have timer3 (34 part) configured in 32-bit unchained mode with internal clock and also in continuous mode (ENAMODE=10). The BW_COMPATIBLE bit is set. When I set the CMP_INT_EN34 bit in INTCTL_STAT register, the interrupt is fired on owerflow as expected and CMP_INT_STAT34 flag is set too. However this happens only once. There is no information about a need to clear any interrupt flag in the timer manual (and it is not needed without BW_COMPATIBLE bit) but I assume that clearing CMP_INT_STAT34 should enable the interrupt to be fired again but unfortunately it is not true. Writing this bit has no effect (it even does not change its value)

    I solved my problem by clearing  CMP_INT_EN34 bit in interrupt routine and setting it to one again. But it is weird because I need two register writes... 

    The situation is the same with the capture interrupt and corresponding register bits. 

    Best regards
    Jan 

  • 0 in reply to Gary Wu
    Expert 1310 points

    Hi,

    I currently have the timer3 working but I need to switch the irq off and on again in the interrupt routine as described in my previous post. I don't know if this solution is correct...

    Jan