The documentation for PLL divider ratios in the Registers PLLDIV4 and PLLDIV5 are different between the PLL User's Guide (SPRUE56) and the Device Datasheet (SPRS276M). The CSL function CSL_pllcHwSetup() implement the ratios as descibed in the PLL User's Guide (Register = Ratio-1), but I think this is not correct.
Ralf