Significance of '0x11F00700' memory location for Boot Process

Greetings,

It appear that there is a hidden portion of L1D used by the ROM loader with no mension of it anywhere.  Please see attached.

Good Luck,

Sam 

Further details,

SPRAAT2C–September 2010 says

While  SPRAAT2E–August 2011 says

TI need to clarify which is accurate.  No reference of it in SPRZ303F (TMS320C6748 Fixed/Floating-Point DSP Silicon Revisions 2.1, 2.0, 1.1 and 1.0).

Hi Sandeep

Yes the location you mentioned is used by the RBL to dump th error code during the boot process. This is currently not documented anywhere except for the debug gel file itself and is essentially useful for diagnostics only (which is what we provide the debug gel file for).

Is your SPI boot issue still not resolved?

Regards

Mukul

Hi Sam

Thanks for your contribution on these forums.

To answer your question more specifically, the device by default (on power on) has all of L1D and L1P come up as all cache. The RBL leaves all of L1P as cache, and L1D is configured as 16KB cache *during* boot. After boot , it flushes, invalidates and sets for max cache (restores the power on reset default state).

From a user perspective as recommended, these memory sections still not be used by any initialized sections in the user app. I think author wanted to simplify the above description to essentially still convey the message that this memory should not be used by user app.

Regards

Mukul

Thank you for clarification.  In NOR and HPI it says

Yes, so if your query is on L2, then if used it is specified in the boot loader appnote under the specific boot mode sections.

The original post I believe is on SPI boot.