How do I swap AM33X WEC7 BSP WAVEDEV2 driver to McASP0 w/ TLV320AIC3106 codec?

Hi     weidong zhou

We are interfacing AIC3106 codec to mcasp0 interface(am335x) and we are getting the same errors as you have posted.

PID:00400002 TID:0499003E HardwareContext::StartAudioOutput
PID:00400002 TID:0499003E HardwareContext::StartAudioOutput
PID:00400002 TID:0499003E HardwareContext::StartAudioOutput
PID:00400002 TID:0499003E HardwareContext::StartAudioOutput
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: Buffer underun.
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: Buffer underun.
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: Buffer underun.
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: DMA error.
PID:00400002 TID:0499003E HardwareContext::StartAudioOutput
PID:00400002 TID:0499003E HardwareContext::StartAudioOutput
PID:00400002 TID:0499003E HardwareContext::StartAudioOutput
PID:00400002 TID:0499003E HardwareContext::StartAudioOutput
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: Buffer underun.
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: Buffer underun.
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: Buffer underun.
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: DMA error.
PID:00400002 TID:0499003E HardwareContext::StartAudioOutput
PID:00400002 TID:0499003E HardwareContext::StartAudioOutput
PID:00400002 TID:0499003E HardwareContext::StartAudioOutput
PID:00400002 TID:0499003E HardwareContext::StartAudioOutput
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: Buffer underun.
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: Buffer underun.
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: DMA error.
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: Buffer underun.
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: DMA error.
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: Buffer underun.
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: DMA error.
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: Buffer underun.
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: DMA error.
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: Buffer underun.
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: DMA error.
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: Buffer underun.
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: DMA error.
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: Buffer underun.
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: DMA error.
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: Buffer underun.
PID:00400002 TID:023E0002 WARNING: McASPTX::HandleInterrupt: DMA error.

Should we need to change any configuration in EDMA...?

I need your support....

Hi All,

I would like to share with you my experience with exactly the same problem/error as described above.
I was working with am335x processor and tlv320aic3100 audio codec and I was trying to use wavedev2 audio codec on Windows CE 7.
I have setup audio serial interface in the master mode - WCLK and BCLK generated by the audio codec, 48kHz sample rate.

I could play the music well but from time to time there were jitters and particles heard.
In the debbug mode it was reported as:
- Buffer underrun
- or DMA error

on the beginning I thought it is a problem with my code, I thought my code works too slow therefore the processor cannot fill in the buffer on time and buffer underrun is reported.
 So. I have spent some time to make it faster but it didn't help. Still there were jitters and particles heard.

After some time spent on it I found that all of these problems are caused by the world lock generated by the codec which is also used as a frame synchronization in MCASP.
It was unstable, sometimes the frame was too short - buffer underrun, and sometimes too long - dma error.
Must probably caused by other interrupts. 

The solution was to change master audio interface  to SLAVE mode.
So all - MCLK, WCLK, BCLK are generated by the processor and they are the inputs to the audio codec.
In this case even if it is not stable the delay will done in all three clocks and you will not hear any jitters or particles anymore.

So what you need to do is:

- change pads configuration - codec WCLK and BCLK should be an output from mcasp
- change mcasp register setting in the hardware context

- .pdir - AFSX, AHCLK, AHCLKX pins  as an output (slave mode)
- all afs clocks internally generated
- all aclk, ahclk clocks internally generated
- setup dividers well to get the right fs/wclk sample rate and the right bit lock frequency

- change audio codec configuration - init to receive wclk and bclk from the processor (slave mode)

I hope it helps!

Regards!
Bartosz 

hi Bartosz 

could you tell me how do it?and now i can hear sound,but the sound is not right .ido not know where is wrong,and where i need to change?

Qiming,

no problem, I can try to help you however I need more details about your current problem.
I do not know what does it mean that the sound is not right.

Do you hear any jitters or particles? Or the sound is too fast or too slow?
I need to know what the desired configuration is - for instance sample rate, PLL usage, number of channels, mono or stereo sound, your clocks frequency, is it i2s  etc.

It would be good if you can share you current configuration of:
- audio codec registry setup
- host processor registry setup especially related to the audio port chosen by you
- your current  pads configuration
- any change in windows registry 

Can you share any error log as you can see in previous messages on this blog?

if you can already hear the sound but it is not right in most of cases it is related to the frequency of MCLK, WCLK or BCLK or the synchronization of these clock between audio codec and the host processor.

Regards!
Bartosz

hi Bartosz Utrata

thanks for your replay!

Now i can hear sounds ,but the sounds hearded were too slow,and some noise just like 'zi~zi~zi~zi~ were heard.

The cpu is seted slave mode ,the TLV320AIC3106 codec is seted master mode.

Here are addtional code changes i made upon TI WEC7 BSP.

I added macro define for McASP0 pin mux in  C:\WINCE700\platform\AM33X_BSP\SRC\INC\bsp_padcfg.h

#define MCASP1_PADS \
PAD_ENTRY(MCASP0_FSR, MODE(3) | AM335X_PIN_INPUT_PULLDOWN) \
PAD_ENTRY(MCASP0_ACLKR, MODE(3) | AM335X_PIN_INPUT_PULLDOWN) \
PAD_ENTRY(MCASP0_AXR1, MODE(3) | AM335X_PIN_INPUT_PULLDOWN) \
PAD_ENTRY(MCASP0_AHCLKX, MODE(3) | AM335X_PIN_INPUT_PULLDOWN) \

 In C:\WINCE700\platform\AM33X_BSP\SRC\DRIVERS\WAVEDEV2\hwctxt.cpp

       /* .pfunc    = */ 0x00000000,                /* all mcasp pin */

        /* .pdir     = */ 0x00000001,                /* only pin-1 is output */

        /* .gblctl   = */ 0x00000000,                /* ctrl clk, hclk, statem - reset,release - driver ctrl */

        /* .ditctl   = */ 0x00000000,                /* DIT mode seting */

        /* .dlbctl   = */ 0x00000000,                /* loop back mode setting */

        /* .amute    = */ 0x00000000,                /* Amute setting */

        /* .srctl0   = */ 0x0000000D,                /* serialiser 0 */

        /* .srctl1   = */ 0x0000000E,                /* serialiser 1 */

        /* .srctl2   = */ 0x00000000,                /* serialiser 2 Tx */

        /* .srctl3   = */ 0x00000000,                /* serialiser 3 Rx */

        /* .srctl4   = */ 0x00000000,                /* serialiser 4 */

        /* .srctl5   = */ 0x00000000,                /* serialiser 5 */

        /* .srctl6   = */ 0x00000000,                /* serialiser 6 */

        /* .srctl7   = */ 0x00000000,                /* serialiser 7 */

        /* .srctl8   = */ 0x00000000,                /* serialiser 8 */

        /* .srctl9   = */ 0x00000000,                /* serialiser 9 */

        /* .srctl10   = */ 0x00000000,               /* serialiser 10 */

        /* .srctl11   = */ 0x00000000,               /* serialiser 11 */

        /* .srctl12   = */ 0x00000000                /* serialiser 12 */

    },                                          

    {                                              

        /* .rmask    = */ 0xFFFFFFFF,                 

        /* .rfmt     = */ 0x00018074,

        /* .afsrctl  = */ 0x00000112,             

        /* .rtdm     = */ 0x00000003,             

        /* .rintctl  = */ 0x00000000,             

        /* .rstat    = */ 0x000001F7,               

        /* .revtctl  = */ 0x00000000,             

        {                                         

            /* .aclkrctl  = */ 0x000000AF,          

            /* .ahclkrctl = */ 0x00000000,          

            /* .rclkchk   = */ 0x00FF0008          

        },                                        

    },                                             

    {                                              

        /* .xmask    = */ 0xFFFFFFFF,             

        /* .xfmt     = */ 0x00018074,

        /* .afsxctl  = */ 0x00000110,             

        /* .xtdm     = */ 0x00000003,             

        /* .xintctl  = */ 0x00000000,             

        /* .xstat    = */ 0x000001F7,               

        /* .xevtctl  = */ 0x00000000,             

        {                                         

            /* .aclkxctl 80  = */ 0x00000080,          

            /* .ahclkxctl = */ 0x00000000,          

            /* .xclkchk   = */ 0x00FF0008             

        },                                        

    },                                             

    0x00000001              /*emu free*/

};

McaspHwSetupData g_McAspXmtSetup = 

{

    /* .xmask    = */ 0xFFFFFFFF,        // No padding used

    /* .xfmt     = */ 0x00018074,        // MSB first, 16bit, 1bit-delay, writ from DMA, Rot by 16bit pos

    /* .afsxctl  = */ 0x00000110,        // 2TDM, 1bit Rising, EXT FS, bit-width

    /* .xtdm     = */ 0x00000003,        // TDM slots 0 & 1 enabled

    /* .xintctl  = */ 0x0000000F,        // reset any existing status bits

    /* .xstat    = */ 0x000001F7,        // reset any existing status bits

    /* .xevtctl  = */ 0x00000000,        // Generate DMA events

    {                                         

         /* .aclkxctl  = */ 0x00000080,  // Rising, SYNC, EXT, /1 (ASYNC, Rising INTERNAL CLK, div-by-16)

         /* .ahclkxctl = */ 0x00000000,  // EXTERNAL CLK, div-by-1

         /* .xclkchk   = */ 0x00FF0008   // 255-MAX 0-MIN, div-by-256          

    },

};

McaspHwSetupData g_McAspRcvSetup = 

{

    /* .rmask    = */ 0xFFFFFFFF,        // No padding used

    /* .rfmt     = */ 0x00018074 ,       // MSB 16bit, 1-delay, no pad, CFGBus

    /* .afsrctl  = */ 0x00000110,        // 2TDM, 1bit Rising, INTERNAL FS, word

    /* .rtdm     = */ 0x00000003,        // Slots 0,1

    /* .rintctl  = */ 0x00000000,        // reset any existing status bits

    /* .rstat    = */ 0x000001F7,        // reset any existing status bits

    /* .revtctl  = */ 0x00000000,        // Generate DMA events

    {                                         

         /* .aclkrctl  = */ 0x0000008F,  // Rising INTERNAL CLK (from tx side)

         /* .ahclkrctl = */ 0x00000000,  // INT CLK (from tx side)

         /* .rclkchk   = */ 0x00FF0008   // 255-MAX 0-MIN, div-by-256

 In C:\WINCE700\platform\AM33X_BSP\SRC\DRIVERS\WAVEDEV2\TLV320AIC3106.cpp

WriteAIC(TLV320AIC3106_PAGESELECT, TLV320AIC3106_PAGESELECT_ZERO); // Select page 0
WriteAIC(TLV320AIC3106_PAGESELECT_ONE, 0x80); // Reset AIC3106

Sleep(2);

WriteAIC( TLV320AIC3106_CDCSAMPRATE, SAMPLE_RATE_DIV); // 2 fs = FS_REF/SAMPLE_RATE_DIV

WriteAIC( TLV320AIC3106_PLLPROGA, (0x80 | (P & 0x01))); // 3
// WriteAIC( TLV320AIC3106_PLLPROGB, ((J & 0x3F) << 2)); // 4
WriteAIC( TLV320AIC3106_PLLPROGB, 0x20); // 4 add by mr wang

//WriteAIC( TLV320AIC3106_PLLPROGC, R5_VAL);
// WriteAIC( TLV320AIC3106_PLLPROGD, R6_VAL);
WriteAIC( TLV320AIC3106_PLLPROGC, 0x1E ); // 5 PLL C <- [D=1920] add by mr wang
WriteAIC( TLV320AIC3106_PLLPROGD, 0x00 ); // 6 PLL D <- [D=1920] add by mr wang

WriteAIC( TLV3201AIC3106_CODECDATPATH, (FS_REF|0x08|0x02) ); // 7
WriteAIC( TLV320AIC3106_ASDICTRLA, (0x80|0x40|0x10)); // 8 0x80|0x40|0x10
WriteAIC( TLV320AIC3106_ASDICTRLB, 0x00 ); // 9
WriteAIC( TLV320AIC3106_ASDICTRLC, 0x00 ); // 10

// WriteAIC( TLV320AIC3106_CDCOVRFLOWFLG, (R & 0x0F) ); // 11
WriteAIC( TLV320AIC3106_CDCOVRFLOWFLG, 0x01 ); // 11

// LINE1
WriteAIC( TLV320AIC3106_LEFTADCPGAGAINCTL, 0 ); // 15
WriteAIC( TLV320AIC3106_RIGHTADCPGAGAINCTL, 0 ); // 16
WriteAIC( TLV320AIC3106_LINE1LADCLCTL, 0x04 ); // 19
WriteAIC( TLV320AIC3106_LINE1RADCRCTL, 0x04 ); // 22

WriteAIC( TLV320AIC3106_LEFTAGCCTLB, 0 ); // 27
WriteAIC( TLV320AIC3106_RIGHTAGCCTLB, 0 ); // 30
WriteAIC( TLV320AIC3106_DACPWROUTDRVCTRL, (0x80|0x40|0x20) ); // 37
WriteAIC( TLV320AIC3106_HPRCOM_CTL, 0x10 ); // 38
WriteAIC( TLV320AIC3106_LEFTDACVOLCTRL, leftVol ); // 43
WriteAIC( TLV320AIC3106_RIGHTDACVOLCTRL, rightVol ); // 44

// HPOut
WriteAIC( TLV320AIC3106_DACL1TOHPLOUTCTRL, 0x80 );// 47
WriteAIC( TLV320AIC3106_HPLOUTLVLCTRL, (0x08|0x01));// 51
WriteAIC( TLV320AIC3106_DACR1HPROUTVOL, 0x80 );// 64
WriteAIC( TLV320AIC3106_HPROUTLVLCTRL, (0x08|0x01));// 65
WriteAIC( TLV320AIC3106_DACL1TOLEFTLOP, 0 ); // 82
WriteAIC( TLV320AIC3106_LEFTLOPMLVLCTRL, 0 ); // 86
WriteAIC( TLV320AIC3106_DACR1TORIGHTLOP, 0 ); // 92
WriteAIC( TLV320AIC3106_RIGHTLOPMLVLCTRL, 0 ); // 93

WriteAIC( TLV320AIC3106_HPLCOM_OUTPUTLVL_CTL, 0 ); // 58
WriteAIC( TLV320AIC3106_HPRCOM_OUTPUTLVL_CTL, 0 ); // 72

WriteAIC( TLV320AIC3106_ADDGPIOCTLB, R101_PLLDIV_OUT ); // 101
WriteAIC( TLV320AIC3106_CLKGENCTL, R102_PLLCLK_IN_MCLK ); // 102

m_OutputDevice = WAV_SET_OUTPUT_HDP;

DEBUGMSG( ZONE_FUNCTION,
(L"-TLV320AIC3106CodecConfig::EnableHPOut_PLL\r\n"));
}

sorry Bartosz Utrata my english is not very good.

hi Bartosz Utrata

thanks for your replay!

Now i can hear sounds ,but the sounds hearded were too slow,and some noise just like 'zi~zi~zi~zi~ were heard.

The cpu is seted slave mode ,the TLV320AIC3106 codec is seted master mode.

sorry my english is not very good! I have boarding my changes in that two files!

7127.tlv320aic3106.cpp

hi Bartosz Utrata

thanks for your replay!

Now i can hear sounds ,but the sounds hearded were too slow,and some noise just like 'zi~zi~zi~zi~ were heard.

The cpu is seted slave mode ,the TLV320AIC3106 codec is seted master mode.

sorry my english is not very good! I have boarding my changes in that two files!

7536.hwctxt.cpp

hi Bartosz Utrata

thanks for your replay!

Now i can hear sounds ,but the sounds hearded were too slow,and some noise just like 'zi~zi~zi~zi~ were heard.

The cpu is seted slave mode ,the TLV320AIC3106 codec is seted master mode.

sorry my english is not very good! I have boarding my changes in that two files!

Qiming,

it is still not enough information to help you. Don't worry about your English. Please try to answer my previous questions as you can.

If the sound is too slow most probably the frequency of your bit clock - BCLK is too low, try to increase it. How to do it? It depends what is the source frequency of your BCLK how the divider is setup etc.
If you hear  "zi zi zi"  :-) must probably it is "buffer underrun" but it is hard to make sure about it if I do not see the error log.
You can also try to setup audio codec as a slave and processor as master. See this documantation:

http://www.ti.com/lit/an/slaa469/slaa469.pdf

Regards!

Bartosz 

Bartosz Utrata

 thanks for your help!

now i can understand how to set the master and slave mode . The code is provided by TI, the inside of the set ,cpu is slave mode and the audio is master mode .tomorrow i will try it as you say.

Thanks again ! Can i know where are you from ?I am from china.

Qiming,

I'm glad I could help you. I'm from Poland.

Regards!
Bartosz

Hi weidong zhou

can you tell me the other changes of zhe codes?Now i can hear sounds,but the sounds heared slowly,and always heared "zi,zi,zi".

please!!

Hi Bartosz Utrata

I haved tested my development board.the BCLK = 48k HZ  MCLK = 1.56M HZ . but the sound is also slowly!

Hi Qiming,

as I mentioned in one of my previous posts most probably it is related to BCLK clock which frequency defines how fast the data is being sent to the codec. Please check the frequency of your BLCK and BCLK divider set up. Try to increase the frequency.

Regards!

Bartosz

Qiming,

and I don't think that the frequency of 48kHz is your BLCK.
It is rather a sample rate - fs.
Please check audio codec documantation and see how to calculate BCLK frequency.

Regards!

Bartosz 

hi Bartosz Utrata

This is my debugging information .

2308.debuging information.txt

please help me to have a look!!

Quming.

as I predicted. This is related to your clocks and mode configuration:

Buffer underrun - DMA buffer is empty when you try to send a data to the codec. The processor did not finish sending a data before WCLK frame finished.

DMA error = buffer overflow - the processor tried to send more data in one WCLK frame than DMA capacity.

There can be two possible reasons:
1. WCLK and BCLK are not configured well
2. There is a problem with clocks synchronization between a processor and audio codec

I had exactly the same issue and in my case it was a problem with a synchronization. The clock bits were delayed from time to time and the reason were other interrupts - especially graphic interrupts that caused a delay.
To solve it I have setup slave mode configuration - both WCLK and BCLK clock where generated by the processor not by the codec.

Please see the following documents to setup slave mode well:
1. Configuration of you host processor especially mcasp section to see how to setup registers to generate WCLK and MCLK with a desired frequency. Please note that you also need to activate more mcasp pins there to send a clock bit from a processor to the audio codec.

2. See your audio codec documentation to change a registry, stop generating WCLK and BCLK and configure your audio codec to receive  WCLK and BCLK from the processor. As I remember it is only one register.

By setting up a slave mode you prevent from de-synchronization of the WCLK and BCLK between processor and audio codec . It helped in my case.

Regards!
Bartosz 

Qiming,

sorry I have edited my previous post. I wrote master mode but I had in mind SLAVE mode.
Slave = all three clocks MCLK, WCLK, BCLK are generated by the processor.

Bartosz 

Hi Bartosz:

I set the cpu is master mode,and the codes as slave mode.but  i can not hear the sound.can you tell me how to do it .and i want to know where are you changed in the hwctxt .cpp .

Hi Bartosz:

This is my changes.please help me to have a look.

#define MCASP1_PADS \
PAD_ENTRY(MCASP0_FSR, MODE(3) | AM335X_PIN_OUTPUT) \
PAD_ENTRY(MCASP0_ACLKR, MODE(3) | AM335X_PIN_OUTPUT) \
PAD_ENTRY(MCASP0_AXR1, MODE(3) | AM335X_PIN_OUTPUT) \
PAD_ENTRY(MCASP0_AHCLKX, MODE(3) | AM335X_PIN_INPUT_PULLDOWN)

 /* .pdir     = */ 0x14000001, 

/* .srctl0 = */ 0x0000000D,
/* .srctl1 = */ 0x0000000E,

/* .afsrctl  = */ 0x00000112,

/* .aclkrctl  = */ 0x000000AF,

/* .afsxctl  = */ 0x00000112,

/* .aclkxctl 80  = */ 0x000000AF,