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DM6437 PLL AIC33

Junqing Zhao
Intellectual 770 points
Other Parts Discussed in Thread: TLV320AIC33

Hello，everyone

Recently，I learnt something about AIC33. But I met a problem. I used psp_1_00_02_00,in psp_aic33Codec.c file,some configuration is

 

        case 8000:  /* FS = Fref/6   */

            PLLB_Value      = 0x20;

            PLLC_Value      = 0x6E;

            PLLD_Value      = 0x23;

            fsRef           = FSREF_48000;

            sampleRateDiv   = 0x0A;

            break;

I have seen the tlv320aic33.pdf file，but I don’t know why this PLLD_Value set 0x23.

In tlv320aic33.pdf file, it says that

That is to say，the least 2 bits are always 00，which contradict with 0x23. So why this happens？

Following the tlv320aic33.pdf description，I can not calculate the PLLD = 0x23. How to calculate？

Thank you in advance. I am looking forward to your reply.

 

Junqing Zhao

  • 0
    Genius 3575 points

    Notice how the PLL D value is defined as bits D7-D2 of that register.  Look at the code where the value is actually stored to the register, chances are that the PLLD_Value is shifted 2 bits to the left before being stored.  I couldn't find any of the items you referenced, so you'll have to confirm that yourself.