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Documentation question

Hi,

I was TRM on some clock registers. There are registers that can be used to get status of various clocks. For example CM_L3_AON_CLKSTCTRL register (CLKACTIVITY_L3_AON_GCLK bit) can be used to read if L3_AON clock is active or not. I've searched TRM for description of what L3_AON clock is and I can't find anything about it. 

Is there another document that explains these various clocks in more details?

Thank you,

Valentin

  • Hi Valentin,

    Provide more details like which board? and version of PSP using?

    Regards

    AnilKumar

  • Hi Valentin,

    I missed out the tag part, so requested for board details. You can get more details from TRM folks

    Regards

    AnilKumar

  • Valentin, the L3_AON is the L3 AlwaysOn clock.  It is the main L3 clock coming from the CorePLL that drives a number of interconnect logic and peripherals.  Search for "L3" and you'll see that it is distributed as L3F_CLK (fast) and L3S_CLK (slow) throughout the chip.

    Regards,

    James

  • Hi James,

    Thank you for explanation. I see information about L3F_CLK and  L3S_CLK,but I didn't know that it the distribution of the L3_AON. What is L3_INSTR clock? Will the more detailed description of these clock be added to TRM or is there a separate document? I see some of these clocks are initialized in various example in StarterWare, but when I want to know what are these clocks all I find is a register information that controls the clock, but not the functional description of the clock.

    Thank you,

    Valentin