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About EMIF sync fifo mode (with Glue logic)

Dear Sir,

I'm using Ti DM642 connecting to FPGA using EMIFA (CE2) and the EMIFA CE2 is configured as Sync FIFO mode with Glue.

I try to generate a back-to-back data transfer (burst mode) from Ti and how can I reach that by using the EDMA? I  try to put data in L2-SRAM

 and enable EDMA to move data out to EMIFA CE2, but I only see the data is transferring a word once? below is my edma setting,

ping is point to L2 SRAM and CE2_FPGA is the "EMIFA CE2"

    EDMA_OPT_RMK
    (         
  EDMA_OPT_PRI_LOW,
     EDMA_OPT_ESIZE_32BIT,
     EDMA_OPT_2DS_NO,
     EDMA_OPT_SUM_INC,//NONE,
     EDMA_OPT_2DD_NO,
     EDMA_OPT_DUM_NONE,
     EDMA_OPT_TCINT_YES,
     EDMA_OPT_TCC_OF(TCCINTNUM),
     EDMA_OPT_TCCM_OF(TCCINTNUM >> 4),
     EDMA_OPT_ATCINT_NO,
     EDMA_OPT_ATCC_OF(0),
     EDMA_OPT_PDTS_DISABLE,
     EDMA_OPT_PDTD_DISABLE,
        EDMA_OPT_LINK_YES,
     EDMA_OPT_FS_NO
    ),
    EDMA_SRC_OF(ping),//(&ping_data),//Source address register
    EDMA_CNT_OF(BUFF_SZ),   //Transfer count parameter
    EDMA_DST_OF(CE2_FPGA),//(ping),      //Destination address parameter
    EDMA_IDX_OF(0x00000004),//Index parameter
    EDMA_RLD_OF(0x00000000) //Count reload/link parameter

Henry

  • Henry,

    Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages. Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics.

     My suspicion is that you need the DUM to be set to INC. I assume you do not have the EA address lines connected to the Sync FIFO device, so incrementing addresses will not hurt anything.

    The timing diagrams in the EMIF User's Guide show the EA lines changing during the bursts. So this is why I think you should try with DUM=INC.

    Please try it and let us know the results, either good or bad results.

    Regards,
    RandyP