Hi,
I need some clarification on the Edge-Sensitive DMA Request Scheme. The TRM only mentions that DMA request asserted on the falling edge, but does not say how long the request line has to stay low.
I'd like to configure the block size = 10 * frame size; and make each DMA request to trigger only one transfer (one data frame), but the DMA does not interrupt the processor until 10 transfers (a block) are complete. Does anyone know whether I can do that? So far I cannot make it to work, each DMA request always triggers 10 data frames, and generate one block interrupt.
Thanks in advance!
Bin