about fiq interrupt in TI8148

I debug my code on TI8148 EVM with XDS100V2 USB simulator under ccs5.0.

for some reason, I need to trigger a fiq exception.  so i set the FIQNIRQ bit in INTCPS_ILR register,  but  when I run the instruction to trigger a fiq interrupt, the  ccsv5 can't step into my fiq handler function. for a moment, it then alert a dialog with the text as follows:

Warning:

Cannot halt the processor
(Error -2062) @ 30010 (0x753A)

Actually, when i clear the FIQNIRQ bit, ccsv5 can run into my irq handler function. I don't know what's wrong.

another question:

as you know, after reset, TI8148  with the ARM Cortex-A8 core execute the secue code stored in ROM memory first, then copy the bootloader from somewhere  to the RAM on chip and run as nonsecure.

the code in ROM seem to have configed the SCR register , so FIQ can be nonmaskable in the Nonsecure state. But is there any possibility to mask fiq in my code ?

because i need to mask it before my own operate system really start.