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PCIE configuration Read ,

Hello , 

I wanted to perform a configuration read of a register in a Brigde relied to a C6678 by PCI Express , is this code is correct  :

pcieRet_e ReadFromRemote(Pcie_Handle handle)
{

pcieCfgTransReg_t trans_Config;
pcieVndDevIdReg_t devid;

pcieRegisters_t getRegs;
pcieRegisters_t setRegs;

pcieRet_e retVal;

memset (&trans_Config, 0, sizeof(trans_Config));
memset (&devid, 0, sizeof(devid));
memset (&getRegs, 0, sizeof(getRegs));
memset (&setRegs, 0, sizeof(setRegs));

getRegs.cfgTrans= &trans_Config;

if ((retVal = Pcie_readRegs (handle,pcie_LOCATION_LOCAL,&getRegs)) != pcie_RET_OK)
{
System_printf ("Read pcieVndDevIdReg_t register failed!\n");
return retVal;
}

trans_Config.func=1;
trans_Config.device=16;
trans_Config.bus=1;
trans_Config.type=0;

setRegs.cfgTrans= &trans_Config;

if ((retVal = Pcie_writeRegs (handle, pcie_LOCATION_LOCAL, &setRegs)) != pcie_RET_OK)
{
System_printf ("SET CMD STATUS register failed!\n");
return retVal;
}

memset (&getRegs, 0, sizeof(getRegs));

getRegs.vndDevId=&devid;

if ((retVal = Pcie_readRegs (handle, pcie_LOCATION_REMOTE, &getRegs)) != pcie_RET_OK)
{
System_printf ("SET CMD STATUS register failed!\n");
return retVal;
}

printf("0x%x",getRegs.vndDevId->devId);

return pcie_RET_OK;

}

  • I think the RC should generate Type 1 configuration access to the Bridge which is located in bus number=1(>0). The host bridge (inside RC) has bus number = 0, and it will transform the request to Type 0 and forward it to the downstream port (like the Bridge connected to the RC). So it is probably to be "trans_Config.type=1;". 

    And the bridge/switch normally associates only Device 0 with the device attached to the bus. And the configuration requests specifying all other device number (1-31) will be terminated by the switch/bridge. I am not sure if it is correct to be device=16 here.

    And the function number is also normally to be 0. But it could be multi-function device in your scenario. You can double check the data manual of the Bridge module you choose.

    I think the other configurations in the code seem fine, but we need to figure out if the bus/device/function number in this configuration access is really targeted to the Bridge you want to access.

    The PCISIG base specification has more details of the configuration access, such as section 7.3 Configuration Transaction Rules in PCIe Base Rev2.0.

    You may also find some examples/descriptions as well along with the PCIe bridge product you are using.

    Sincerely,

    Steven