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EMIF and DSP/BIOS

Hi.

I’m trying to use the EMIF with a TMS320C5502 and DSP/BIOS. On the EMIF is connected a 4Mb (256k*16) ASRAM on CE0, the other CE are empty. It’s important to note that there is a FPGA in between, which is not yet programmed (still waiting for the programmer…) so the signal don’t actually go to the memory. However, I guess I should see some signal trying to go to the ASRAM since the EMIF should send the data and not waiting anything in return…

So here is what I did:

-          In the DSP/BIOS configuration, I added under the MEM module a new object (ASRAM), configured like this:

Base: 0x010000

Len: 0x3f0000

Create a heap in this memory: True

Heap size: 0x3f80

User definied identifier: True, EMIF0

Space: Code/data

-          I configured the EMIF register like this:

void EMIF_Init(void)
{
        EMIF_Config cEMIF = {
            EMIF_GBLCTL1_RMK(
                    EMIF_GBLCTL1_NOHOLD_HOLD_ENABLED,
                    EMIF_GBLCTL1_EK1EN_ENABLED,
                    EMIF_GBLCTL1_EK1HZ_HIGHZ),
            EMIF_GBLCTL2_RMK(
                    EMIF_GBLCTL2_EK2RATE_1XCLK,
                    EMIF_GBLCTL2_EK2HZ_HIGHZ,
                    EMIF_GBLCTL2_EK2EN_DISABLED),
            EMIF_CE1CTL1_DEFAULT,
            EMIF_CE1CTL2_DEFAULT,
            EMIF_CE0CTL1_RMK(
                    EMIF_CE0CTL1_TA_OF(3),
                    EMIF_CE0CTL1_READ_STROBE_OF(12),
                    EMIF_CE0CTL1_MTYPE_16BIT_ASYNC,
                    EMIF_CE0CTL1_WRITE_HOLD_MSB_LOW,
                    EMIF_CE0CTL1_READ_HOLD_OF(7)),
            EMIF_CE0CTL2_RMK(
                    EMIF_CE0CTL2_WRITE_SETUP_OF(2),
                    EMIF_CE0CTL2_WRITE_STROBE_OF(15),
                    EMIF_CE0CTL2_WRITE_HOLD_OF(3),
                    EMIF_CE0CTL2_READ_SETUP_OF(2)),
            EMIF_CE2CTL1_DEFAULT,
            EMIF_CE2CTL2_DEFAULT,
            EMIF_CE3CTL1_DEFAULT,
            EMIF_CE3CTL2_DEFAULT,
            EMIF_SDCTL1_DEFAULT,
            EMIF_SDCTL2_DEFAULT,
            EMIF_SDRFR1_DEFAULT,
            EMIF_SDRFR2_DEFAULT,
            EMIF_SDEXT1_DEFAULT,
            EMIF_SDEXT2_DEFAULT,
            EMIF_CE1SEC1_DEFAULT,
            EMIF_CE0SEC1_DEFAULT,
            EMIF_CE2SEC1_DEFAULT,
            EMIF_CE3SEC1_DEFAULT,
            EMIF_CESCR_RMK(0x0002)
            
        };
        
        EMIF_config(&cEMIF);
}

-          Finally, I made this code:

void testMemory(void)
{
	int* test_block;
	test_block = (int*)MEM_alloc(ASRAM, 0x800, 0);
	int i;
	while(TRUE)
	{
		for(i = 0; i<63; i++)
		{
			*(test_block + 4) = i;
		}
	}
}



Finaly, in my .h, I added this line so the compiler don't complain about the ASRAM in the MEM_alloc (cause I saw on the net there was a bug with the Tconf generator...)

extern const Int ASRAM;

In code composer, when I stop, the pointer test_block has the good value (0x00010000),  is located in the DARAM (0x0015C4@DATA), but the value of *(test_block) is -1. And when I look at the scope, I don’t have anything between the FPGA and the  DSP…

So, where did I screw up?

 

Thanks a lot!

  • Matthieu,

    As far as your BIOS configuration goes, what you did seems OK.  At this point, your question probably is beyond the expertise of people on the BIOS forum, so I am moving this thread over to the C5x device forum in hopes that you will get a faster response there.

    Dave