I have a question on the DDR2 Memory Speed.
1) In the Data sheet SPRS717c in Section 5.4.2.2 it states the min clock period is 3.75 which relates to a clock rate of 266MHz or a DDR2 speed of 532MHz
5.4.2.2 DDR2 Routing Guidelines
5.4.2.2.1 Board Designs
TI only supports board designs that follow the guidelines outlined in this document. The switching
characteristics and the timing diagram for the DDR2 memory interface are shown in Table 5-36 and
Figure 5-33.
Table 5-36. Switching Characteristics Over Recommended Operating Conditions for DDR2 Memory
Interface
NO. PARAMETER MIN MAX UNIT
1 tc(DDR_CK/DDR_CKn) Cycle time, DDR_CK/DDR_CKn 3.75 8(1) ns
(1) The JEDEC JESD79-2F specification defines the maximum clock period of 8 ns for all standard-speed bin DDR2 memory devices.
Therefore, all standard-speed bin DDR2 memory devices are required to operate at 125 MHz.
So is 532 the highest rate for DDR2? Just want to confirm
