EMIF-SDRAM

Deepak,

Which device are you using? This post was placed in the C67x Forum and the tag says C6713, but the text above says DSK6211.

Did you duplicate the SDRAM connections from a DSK?

deepak siddharth said:

"Data verification failed at address 0x80000000. Please check the memory and memory map".

This error message means that there is a problem with accessing the memory at address 0x80000000 and you need to check the hardware and the EMIF configuration. There are many errors you can make, so you will need to do debug and testing on your custom board to find the problem.

Start by loading a test program into internal memory and see if it will work. The test program should not access external memory for program or data.

If everything runs correctly from internal memory, then start debugging the external memory. Double-check your EMIF register settings, use relaxed settings where possible for test purposes, then start looking at the SDRAM interface signals with a scope and/or logic analyzer.

Your engineering skills will lead you closer to the problem and to the solution.

Regards,
RandyP

Randy

Sorry i wasn't sure of posting in which forum as i didn't find any for C62x core.

OK i have loaded a program into internal memory and its running(not accessing SDRAM). Now when i write the some values into sdram and read it back i get errors and its strange i don't get any fixed pattern out of it.   My EMIF initialization settings. Im using two MT48LC4M16A2-75 -(64Mb 16-bit x 4 banks x 1M) SDRAM devices h/w connections are as per the DSK

init_emif()
  {
 /*
  * First we define the EMIF addresses
  */
  #define EMIF_GCTL         0x01800000
  #define EMIF_CE1          0x01800004
  #define EMIF_CE0          0x01800008
  #define EMIF_CE2          0x01800010
  #define EMIF_CE3          0x01800014
  #define EMIF_SDRAMCTL     0x01800018
  #define EMIF_SDRAMTIMING  0x0180001C
  #define EMIF_SDRAMEXT     0x01800020
  #define EMIF_CCFG         0x01840000;    /*Cache configuration register*/
 
 /*
  * Now we set the values
  */
  *(int *)EMIF_GCTL = 0x00003300;        /* EMIF global control register   */
  *(int *)EMIF_CE0 = 0x00000030;         /* CE0-SDRAM                      */
  *(int *)EMIF_CE2 = 0xFFFFFF23;         /* CE2-32bit async on daughtercard*/
  *(int *)EMIF_CE3 = 0xFFFFFF23;         /* CE3-32bit async on daughtercard*/
  *(int *)EMIF_SDRAMCTL = 0x07227000;    /* SDRAM control register(100 MHz)*/
  *(int *)EMIF_SDRAMTIMING = 0x0000061A; /* SDRAM Timing register        */
  *(int *)EMIF_SDRAMEXT = 0x00054529;    /* SDRAM Extension register       */   
   }

Deepak,

Our forum labels are not completely clear and may not include every device. The C6211 is a very old device that we would not expect anyone to be designing a new board with now, because there are more powerful DSPs that cost less and use more recent memory devices.

Is it correct that the C6211 is what you are using? Actually, the C6211B.

Is the SDRAM device that you use 100% pin- and performance-compatible with the devices on the DSK? If so, do you use the same configuration values as the DSK examples?

You may be able to compare your EMIF settings with the SDRAM datasheet and find a parameter that needs to be changed. If not, your debug will require looking at the pins to see whether the waveforms match the datasheets for both the DSP and the SDRAM.

Regards,
RandyP