hello:
I am working with c6748, and I used the uart, andI have question!
1.<TMS320C6748 DSP Technical Reference Manual>30.3.1 Receiver Buffer Register (RBR) says:
When the UART is in the FIFO mode, RBR is a 16-byte FIFO!
and the FIFO Control Register (FCR): FCR.RXFIFTL bit is Receiver FIFO trigger level. But It can hold 14Byte at most! Should it 16byte at most?? I set the uart as a fifo, FCR.RXFIFTL = 3,witch means 14byte based on the data sheet! But I find when the uart receive 16 byte, a uart interrupt happened!
Is the data sheet has an error?
2.when uart is as a fifo for sending data, fifo level is 8byte!
Will the Transmitter Shift Register shift data from fifo when I write a byte to the fifo, OR when the fifo is full,?
thanks!