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ECC on EMIF?

Mathew Maher49
Expert 2125 points

Is there any way to implement ECC on the EMIF (DDR2/3) without consuming a big chunk of processor time?

Could one of the PRU's be used to calculate the ECC off-line, or would the overall data shuffling required for this still hit the A8 CPU?

Lack of ECC on the external memory interface is a bit of a killer! Any ideas, suggestions welcome.

Mat

  • 0
    TI__Intellectual 1835 points

    Typically, the amount of data going on EMIF (DDR2/3) is at extremely high data rates. PRU can probably do ECC but it would be better to use it for a subset of the overall traffic moving on EMIF. PRU can act as a DMA such that it will interact with ARM, receive commands and process data over external memory bus, do the ECC and put data back in on-chip location. But if you are expecting ARM access a location and PRU seamlessly do on-the-fly ECC under the hood, then it is not likely to work... due to hardware architecture, required data rate, etc.

    Thanks.

    Maneesh

  • 0 in reply to Maneesh
    Expert 2125 points

    Thanks Maneesh. Do you know if there is any glue logic available which could sit between memory and CPU to perform ECC?

  • 0 in reply to Mathew Maher49
    TI__Intellectual 1835 points

    Have you considered using execute-in-place from NOR flash (GPMC has ECC) with L2 cache enabled (L2 cache has ECC)?

    Thanks,

    Maneesh