Hello, I am looking over the AM3894 Sitara Processor Manual and have a question about the GPMC (General Purpose Memory Controller). I see that there are pins that have the same address bits. Address bits GPMC[27..12] all have multiple pins that share the same bit, for example GPMC address 24 is on pinsG2, J3, H1 and N4. I don't understand why this is and when the address bus is configured which pin will be address bit 24? Also, does anyone know which register I must write to to configure the address bus? I inted to connect the GPMC address, data and control signals to an FPGA.
If anyone can help I would greatly appreciate it.