Hello,
I implemented the procedure in "Disabling the Internal Oscillator on the TMS320VC5507/5509/5509A DSP" (spra078c) exactly but I still have issues with disabling CPU and clock.
My troubles boil down to configuring bits 1 and 0 of EBSR (_XBSR). On our system, we do not use EMIF or HPI. We use the signals as GPIO. When bits 1 and 0 are both ones (0x3), CPU and clock will not go to idle. That is, even when idle configuration register (ICR) is set to 0x3F, control flow runs past the IDLE instruction and idle status register (ISTR) still reads 0x2E.
If I clear bits 1 and 0 of EBSR, current consumption shoots up 50mA. Writing 01b (0x1) has the same effect. CPU and clock do go into idle mode but current consumption does not go down. I thought that perhaps disabling EMIF using EMIF registers would fix the increased current consumption. So, I added the following code
_EMIF_EGCR_CFG(EMIF_EGCR_MEMFREQ_1BY16X,EMIF_EGCR_WPE_OFF,EMIF_EGCR_MEMCEN_OFF,EMIF_EGCR_HOLD_HI);
The code has no effect.
Can you tell me why setting bits 1 and 0 of EBSR prevents the CPU from entering idle mode? Setting all GPIO pins as input has no effect. CPU still will not go into idle mode.
Also, can you tell me how to configure EMIF so that clearing bits 1 and 0 of EBSR will not cause current consumption to increase?
Can you tell me why EMIF would consume current when that module is explicitly put in idle mode and I can check that it is in idle mode by checking ISTR?
Your help is much appreciated.
Cheers,
Jae