Hello:
I am working on a project where I've targeted the OMAP-L138 processor. With a fully populated 16 channel data acquisition system the front ends will be producing about 256Mb/s and maybe a bit more for the decimated display information. I had planned to try and stream this on to a microSD card using the SDIO port. However, the SDIO port has a maximum clock rate of 52MHz. and therefore has a maximum transfer rate of around 200Mb/s. I am hoping that I might be able to get around this by attaching some NAND Flash to the EMIFA bus, which at 100MHz. and 16 bits would be able to handle 400Mb/s assuming 4 clocks per transfer. The data sheet shows a connection to a 1G x 16-bit chip giving 2GB of storage. What I need to know is how large a NAND Flash may be supported per chip select? The microSD cards are available in sizes up to 64GB per card. Also, are there enough bits of ECC support for that large of NAND flash devices?
Any feedback or input is welcomed and appreciated!
Thanks for your help.
Best regards,
Paul