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How to port C64x DSP-to-ARM hardware interrupt to C674x?

Other Parts Discussed in Thread: SYSBIOS

Hello

We are porting a project from a TMS320DM644x Digital Media System-on-Chip (DMSoC) to a TMS320DM816x DaVinci Digital Media Processor.

The DSP in the early project is the C64x and the DSP in the new project is the C674x.

We were using a hardware interrupt for the DSP to inform the ARM when certain events take place. The register address being written was 0x01c40010.  I have found documentation describing the purpose of this register:


http://www.ti.com/lit/ug/sprue15/sprue15.pdf   page 17 says that the DSP can interrupt the ARM via two general interrupts

http://www.ti.com/lit/ug/sprue14c/sprue14c.pdf   page 114 describes system control registers, where INTGEN is at address 0x01c40010.

I cannot find similar documentation for the DM816x.

How does the DSP interrupt the ARM on the DM816x? Where can I find documentation for this?

Thanks,

Annie.

  • Replying to bump my post up to the top of the list...

  • Annie,

    The Inter-Processor Communication (IPC) software module in the PSP/SDK is what we provide for interrupts between cores. The hardware mechanism is the Mailbox module, but all of the mailboxes are owned by the IPC module, to my understanding.

    We will have this thread moved to the BIOS forum, which is where I think the right experts are to tell you some better information on how to send an interrupt from the C674x to the Cortex-A8.

    Regards,
    RandyP

  • Annie,

    Are you currently running BIOS/IPC on ARM/DSP?  I should ask, what are you running on ARM/DSP?

    Randy is correct when he says there is a mailbox that is used for communication between ARM and DSP.

    IPC does use this for communicating between ARM/DSP, however, if you are using your own software stack and not IPC, you could use these mailboxes directly.

    Judah

  • Judah,

    On the DSP we are using CCS 5.1.0, sys/bios 6.32.05.54, ipc 1.23.5.40, sysLink 2.10.02.17 and xdc 3.22.04.46. The DSP is a C674x on an EVM DM816x.

    The ARM is running Linux.

    I will do some reading on how IPC can be used to replace hardware interrupts. I assume that SPRUGO6C is the right document to look at? That document has no mention of mailboxes but there are several places where interrupts are discussed.

    Thanks,

    Annie.

  • Annie,

    Please take a look at the DM816x TRM from here: http://www.ti.com/product/tms320dm8168

    Document link: http://www.ti.com/general/docs/litabsmultiplefilelist.tsp?literatureNumber=sprugx8

    Sections 1.12 and 1.13 talk about Inter-Processor-Communication and Mailboxes.

    In case you don't want to use the IPC s/w APIs directly and want to program the h/w yourself, you can refer to IPC s/w implementation for Mailbox and/or Notify module in SysBIOS for an example of how the mailboxes can be programmed in s/w.

    Otherwise, if you do not have any issues in using IPC s/w, then the Notify module gives you a s/w abstraction for the physical IPC interrupts between the processors.

    Regards,
    Mugdha

  • Thanks Mugdha. I will look at these links.

  • Hi, Mugdha

    I have a question about the mailbox to generate a interrupt from DSP to A8.

    Now , I only write the register MAILBOX_IRQSTATUS_RAW_0 on the DSP side.

    And I can see the count of interrupt 77 of A8 increased through the 'cat /proc/interrupt'.

    And I found the number of A8 77 interrupt incresed through 'cat /proc/interrupt' .

    However, I can't verify the executation of the callback function of A8.

    Could you give me some advices.

    Now, I  find the callback function is the _Dm8168IpcInt_isr (Ptr ref), and the function _Dm8168IpcInt_checkAndClearFunc (Ptr arg). If there are the callback function of the  interrupt 77 of A8.

    The file path is ti_sdk\DVRRDK_03.00.00.00\ti_tools\syslink\syslink_2_10_02_17_patched\packages\ti\syslink\ipc\hlos\knl\notifyDrivers\arch\ti81xx\Dm8168IpcInt.c

    Thank you.

    Tianxing