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LCD Data Line Drive Strength

I need to be able to adjust the drive strength on the Display Controller data lines (DISPC2_DATAx) on an OMAP4430 to minimize EMI noise/interference. Does anyone know how to do this??? Can this be done via Display Controller or via the GPIO Pin configuration? Any other settings that could help with the EMI reduction? Any help would be greatly appreciated. Thanks.

-Gbenga

  • Hi Gbenga. I am not an OMAP expert (I'm an analog engineer) but if by drive strength you mean that you would like to slow down the rise and fall times, that is most easily done with an RC low pass filter on each signal. It is also possible that just a series R will result in slower rise times but then the speed will be determined by the parasitic capacitance on the data line. The correct values will need to be calculated, and you will need to be careful that the display will still function properly with the slower edge rates. I will have to leave the question of whether there is anything inside of the OMAP that can affect this to the other experts. - Mark

  • OMAP44xx supports Spread Spectrum Clocking (SSC) to minimize EMI issues that you have described. OMAP44xx offer SSC clocking mode (via SW register setting), SSC is an effective way to reduce EMI is to implement a dither on the CLK frequency. SSC accomplish this goal by modulating the disturbing signals across a wider frequency range, thus spreading the energy across a range of frequencies rather than concentrating it at one frequency.

    Details of enabling SSC clocking mode is in the OMAP44xx TRM.

    Shaheen