Hi All,
what i see is IpcBenchmark example is built on two cores i.e. it should be run only on two cores after each calling IPC_attach to other with following parameters and this will create a <filename>_pe66.c for inclusion of .cfg configured functions to call as part of ipc_attach()
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/* use IPC over QMSS */
MessageQ.SetupTransportProxy = xdc.useModule(Settings.getMessageQSetupDelegate());
var TransportQmssSetup = xdc.useModule('ti.transport.ipc.qmss.transports.TransportQmssSetup');
MessageQ.SetupTransportProxy = TransportQmssSetup;
TransportQmssSetup.descMemRegion = 0;
Program.global.descriptorMemRegion = TransportQmssSetup.descMemRegion;
Program.global.numDescriptors = 2048;
Program.global.descriptorSize = cacheLineSize; // multiple of cache line size
TransportQmss.numDescriptors = Program.global.numDescriptors;
TransportQmss.descriptorIsInSharedMem = true;
TransportQmss.descriptorSize = Program.global.descriptorSize;
TransportQmss.useAccumulatorLogic = false;
TransportQmss.pacingEnabled = false;
TransportQmss.intThreshold = 1;
TransportQmss.timerLoadCount = 0; // timer ticks. This value only has effect when the packingEnabled is true.
TransportQmss.accuHiPriListSize = 1100; // this number should be >= twice the threshold+2
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The above example caters to only between two cores [CORE0 and CORE1] [Point to Point]. with same .cfg settings, can underlying transportqmss mechanism be used for CORE0 to CORE2 or CORE0 to CORE3 configurations [let me remind you, the settings in the .cfg file will be same for all cores for getting the underlying transport mechanism].
I did that experiment and couldn't make the example project work for multiple cores. Things i did
1. I extended to the proclist to four cores.
2. MultiProc wil now have 4 cores.
assuming this, i tried to attach for CORE0 to CORE1, it works and for CORE0 to CORE2 it doesn't. what i understand is a core can attach to other core on qmss transport only once [please refer to http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/192645/689667.aspx#689667]. in that case how to attach ipc over qmss transport for all cores with all cores [please tell w.r.t to this example and from .cfg level, is it possible?]
Thanks
RC Reddy
