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Master / slave setup on C6678

I am trying to add multicore functionality (on a C6678) to an existing single core project (now running on C6414).  I am using SYS/BIOS and CCS 5.1x.  Is there a simple example with master code on Core0 and different slave code on Core1 (or Cores 1-7) to help me get started?

  • Patric,

    You should download and install MCSDK from below link:

     

    http://www.ti.com/tool/bioslinuxmcsdk

     

    If you are interested in doing IPC communications from Core0 to other Cores then there are some standard examples available in pdk_C6670_1_0_0_xx\packages\ti\transport\ipc\examples folder which you can use.

    Regards,

    Bhavin

  • I am looking for a simple mutticore example with separate projects for master (Core0) and slave (Core 1-7) with communication between cores and without a bunch of NDK and other complications.  I have learned what I can from examples using a single image across all cores.  I am specifically interesting in setting up separate .cfg files.

  • Patrick,

    See the Image Processing demo provided with the MCSDK

    {MCSDK_INSTALL_DIR}demos\image_processing\ipc\evmc6678l

    These have separate master/slave images with different .cfg files for each.

    Regards,

    Dan

  •  I just noticed that you don't want an example with the NDK, and the Image Processing demo does include that.

    I don't think we have any existing examples that meet the specific criteria that you are looking for.  The IPC examples are designed to show how IPC works, without being concerned with the details of a Master/Slave implementation that uses different .out files..  

    The question that I would follow up with is "Why do you want to go to a separate master/slave .out file configuration rather than use a single .out file?"  

    The advantages of a single .out file are

    • Only a single code base to maintain
    • In cases where the master also acts as a slave and does some of the same processing as the slaves, it's more intuitive.  
    • A single .out means less steps in creating your boot image.  
    • When debugging, it's simpler because you can just do a single load to all cores.
    The main disadvantage of a single .out file is that you are wasting code space, because you are loading code on the slave cores which will never be run there, and you are loading code onto the master core which will never be run there.  Plus there is a bit of latency for the if() statements that have to determine whether you're the master or the slave core (this one is probably negligible)
    So, the big advantage of going to a multiple .out file implementation is that it saves on memory (this is especially true if you want to run your code from L2 or L1P).  The other case is where you have a task based system, for example where Core0 runs one algorithm on your data and then passes the result to Core 1 to run a completely different algorithm, and so on, or the cores are running different algorithms on different data altogether.
    So, for simple examples, it doesn't make any sense to create a multi .out file implementation, because by design, they are simple, and there's no concern for memory availability.  For large, real-world examples, like the Image Proessing demo, a multi.out file is required, because Core 0 implements a web server (which requires the NDK) and it is significantly large enough that we don't want to duplicate it on all cores.
    You might get some benefit from just taking one of the simple examples and migrating it to a mutliple .out file configuration.  In the beginning, you will have equivalent ..cfg files, but there's no reason you can't add features to the slave cores that the master doesn't have or vice versa.  Alternatively, take two separate single core examples and add the IPC code for them to communicate with one another.  
    Regards,
    Dan