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DPLLS REFCLK on DM814X

Jean-Michel CAPITAN
Prodigy 160 points

Hi,

In the DM814X TRM, one can read (page 321) that the DPLLS reference clock can be as high as 52MHz for OPP 100%.

But for DPLLJ (page 324), the REFCLK seems limited to 2.5MHz. It's a very low value, as the PLL can generate frequencies up to 2GHz.

Please confirm this limitation, and if possible please indicate the reason for this.

Regards,

  • 0
    TI__Expert 6655 points

    Hi Michel,

    Those are the min and max limits of the REFCLK, while setting the frequency we should not exceed these limits.

    With respect to DPLLJ, REFCLK = CLKIN / (N+1), if CLKIN is 0.5MHZ and N should be 0 so that REFCLK is 0.5MHz (satisfies min limit), in other case if CLKIN is 60MHz then N should be >=23 (satisfies upper limit).

    Regards

    AnilKumar

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