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pull-ups on unused HPI/UTOPIA

brady
Intellectual 450 points

I am using a 6457, and I am trying to refine my design to reduce power.  I am not using the HPI or UTOPIA peripherals.  The hardware designers guide (spraav7b) says that the data lines for these two peripherals should be pulled up to reduce leakage power.  My question is this: just how much of a power savings are we talking about here?  I have an existing design I would rather not change if the gain is negligible.

Many thanks,

Brady

  • 0
    TI__Guru* 84110 points

    Brady,

    In general, all CMOS inputs should be pulled one way or the other and never left floating. If we do not have internal pull-ups or pull-downs on these pins then you should have external ones on them.

    Some of our devices have the option of configuring pins as GPIOs, but I am not sure this is the case with these pins on the C6457. If it were possible, you could configure those pins as outputs, then this problem would be solved.

    Unterminated CMOS inputs can put the input buffer's complementary transistors into their active regions so that both could be slightly conductive. Besides a potential for "leakage" current, this is a possible source of system noise since these transistors could act as amplifiers of any electrical noise on those pins.

    It is unlikely that anyone has quantized the bad effects of not using our recommended hardware design practices. This power cost can vary from chip to chip and from one device design to another. You could have 100 boards with only negligible power cost, then you could have the next 100 boards with a big power problem. But I cannot put numbers onto either of those. It was important enough for us to put it in the HDG, and we want your product to be as reliable as possible.

    Regards,
    RandyP