Hello,
I'm doing a program that uses the uPP hardware of a OMAPL138 device. I'm doing it using low level (registers) configuration.
I'm programming the uPP_A channel to receive data (enabling the ENA signal), so I program the DMA i to get data. If I program the DMA and the enable signal goes active in a short time, the transfer completes well (EOW interruption appeares). However if the time between the DMA is programmed and the incoming data is available is too long the DMA seems to become inactive and the transfer never get finished (even if the received amount of data is bigger than the programmed one).
However if I program the DMA I, a "long" time passes (so DMA I must become inactive as well) and then I program the DMA Q (for the other uPP channel) and the incoming data gets available y a short time, both transfers get finished.
Is there any maximun time to start the transfer once the DMA is programed? Do you have any idea?
Regards