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RMII RREFCLK IN RGMII

Anson Yan1
Prodigy 40 points 
In AM335x Evaluation Module ,the AR8031 CLK_25M  connect to RMII_REFCLK，the enternet use the RGMII，but the RMII_REFCLK is the RMII signal ，What is the purpose of doing so?
  • 0
    TI__Guru 60785 points

    Pin multiplexing mode 0 of MII1_REFCLK terminal operates as RMII reference clock.  You are correct, this signal is only required for RMII.

    This signal was accidently connected to the RGMII PHY because the EVM designer did not understand the function of the signal.

    Note: The MII1_REFCLK terminal was originally meant to be a bi-directional signal that allowed the AM335x to source the RMII reference clock to the RMII PHY or allowed an external clock source to be input to AM335x.   However, we recently discovered the RMII reference clock source in AM335x does not comply with the input requirements of RMII PHYs.  Therefore, we have revomed support for operating the AM335x RMII reference clock in output mode.  Please refer to Advisory 1.0.16 in the AM335x Silicon Errata.

    Regards,
    Paul