ECU in VoLIB can't work

golden tiger

Intellectual 625 points

Dear Experts

I am attempting to get the ECU module in the VoLIB to work on C6A8168 processor.

Volib version is 2.0.0 and ECU version is 10.92.0.3.

I don't use Code Composer Studio.

Ezsdk version is 5.02 and bios version is 6.32.01.38.

The code seems to be working - with the exception that the echo canceller is not cancelling the echo.

I have a few questions:

1. The Volib and ECU support C64x DSPs. Can C674x DSPs be supported ?

2. In chapter 5 of ECU Users Manual (Version 1.10), "Table 15. Buffer placement strategy" tells the buffer palcement.

No	Buffer	SA/DA RAM	Static/Scratch	Requirement
1	FG_FILTER	SARAM	Static	Different bank from 2
2	RX_BUF	DARAM	Static	None
3	BG_FILTER	SARAM	Static	Different bank from 2,4
4	BG_UPDATE_BUF	SARAM	Scratch	Different bank from 2,3
5	SRCH_FILTER	SARAM	Static	Different bank from 2,4
6	Stack			Different bank from 2

Should I strictly accoding to the Buffer placement strategy ？

I think that buffers placement is designed to save MIPS and it can't effect the echo canceller.

3. I don't use CCS and I don't know how to place the above buffers in different segment or bank.

over 13 years ago

0 CharlieF over 13 years ago

TI__Intellectual 1605 points

Hi,

Please see my answers below:

golden tiger said:
1. The Volib and ECU support C64x DSPs. Can C674x DSPs be supported ?

A: Yes, the C64x+ library can be linked directly with C674x code. The C674x DSP contains a C64x+ core internally.

golden tiger said:
2. In chapter 5 of ECU Users Manual (Version 1.10), "Table 15. Buffer placement strategy" tells the buffer palcement {table}. Should I strictly accoding to the Buffer placement strategy? I think that buffers placement is designed to save MIPS and it can't effect the echo canceller.

A: You are correct, the buffer placement strategy is designed to achieve optimal efficiency (minimize MIPS). We can attend to this later once the ECU is working properly.

golden tiger said:
3. I don't use CCS and I don't know how to place the above buffers in different segment or bank.

A: As stated above in (2), we can optimize the buffer placement after we ensure that the ECU is working properly.

To get the ECU working properly I have a few questions and comments:

Since the ECU in VoLIB uses delay line compression the "vrecv_in" buffer must contain packed PCM samples (2 samples per 16-bits).
What are you passing to the Rin and Sin ports of the ECU? Can you attach them so I can verify using CCS locally?
Can you provide the output of the ecuGetPerfomance() API function? This will help me verify the ECU configuration.

Regards,
Charlie

0 Caspar Cai over 13 years ago in reply to CharlieF

Prodigy 140 points

Hi Charlie,

I also have a few questions:

1. In ecu.h , "#define ecu_VERF_DLINE_COMPRESS 0x0004" means that delay line compression is enabled. If ecu_VERF_DLINE_COMPRESS is undefined, delay line compression is not used so the "vrecv_in" buffer can't contain packed PCM samples ?

2. How to pack PCM samples if ecu_VERF_DLINE_COMPRESS is defined ?

0 CharlieF over 13 years ago in reply to Caspar Cai

TI__Intellectual 1605 points

Hi Caspar,

Caspar Cai said:
1. In ecu.h , "#define ecu_VERF_DLINE_COMPRESS 0x0004" means that delay line compression is enabled. If ecu_VERF_DLINE_COMPRESS is undefined, delay line compression is not used so the "vrecv_in" buffer can't contain packed PCM samples?

A: This bit is used in our "version bitfield" to interpret the results of ecuGetPerformance(). Specifically, the "feature" member of the third argument (version->feature). This is a bitfield that indicates what features were included at compile-time. If this bit is set (as it is), then delay-line compression is enabled and can't be disabled.

Caspar Cai said:
2. How to pack PCM samples if ecu_VERF_DLINE_COMPRESS is defined?

A: Since you must pack the PCM samples, please follow the method I described in this thread above on 6/15 (point #4).

Regards,
Charlie

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ECU in VoLIB can't work