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Linker Command File for Concerto with Sys/Bios-application running in FLASH.

Walter Saegesser
Prodigy 140 points

I am desperately trying to build a Sys/Bios application running in Flash on a "contolCARD".

 I create new CCS projects choosing "Sys/Bios"  and set the appropriate parameters for the M3 and C28 parts. I create two task for each part. I can compile, load and run the apps (which do nothing yet but burn the time sleeping in the tasks). The command file automatically created is this:

MEMORY
{
    FLASH_BOOT (RWX): origin = 0x00200030, length = 0x8
    FLASH (RWX)     : origin = 0x00200038, length = 0x7FF9C
    C03SRAM (RWX)   : origin = 0x20000000, length = 0x8000
    S07SHRAM (RWX)  : origin = 0x20008000, length = 0x10000
    CTOMMSGRAM (R)  : origin = 0x2007F000, length = 0x800
    MTOCMSGRAM (RW) : origin = 0x2007F800, length = 0x800
}

SECTIONS
{
    /* Allocate program areas: */
    .text       : > FLASH
    .cinit      : > FLASH
    .pinit      : > FLASH
    .init_array : > FLASH
    
    /* Initalized sections go in Flash */
    .const      : > FLASH

    /* Allocate uninitalized data sections: */
    .data       : > C03SRAM
    .bss        : > C03SRAM
    .sysmem     : > C03SRAM
    .stack      : > C03SRAM
    .cio        : > C03SRAM
    .neardata   : > C03SRAM
    .rodata     : > C03SRAM
    .args       : > C03SRAM
}

When I add a startup-file (startup_ccs.c) it requires an section named ".intvecs". I add corresponding entries to SECTONS and MEMORY in the command file.

As far as I understand I also have to define a "ramfuncs" section, in oder to copy flash initialization code to RAM. So I add  it to SECTIONS. Up to now, I can still compile the application.

When I add a " GPIOPinConfigureCoreSelect ( GPIO_PORTC_BASE, 0x80, GPIO_PIN_C_CORE_SELECT );" to main() and include the driverlib.lib to the project, it asks for a ".vtable" section. After adding this to SECTONS, I can't compile the project:

"./configPkg/linker.cmd", line 131: error #10099-D: placement fails for object
".ti_catalog_arm_cortexm3_concertoInit_begin", size 0x5 (page 0). Available
>> Compilation failure
ranges:
FLASH_BOOT size: 0x8 unused: 0x2 max hole: 0x2
error #10010: errors encountered during linking; "T2_M.out" not built
gmake: *** [T2_M.out] Error 1
gmake: Target `all' not remade because of errors. 

That's where I don't get any further. Has anyone an idea what I do wrong?

The command file after the changes is

MEMORY
{
    FLASH_BOOT (RWX): origin = 0x00200030, length = 0x8
    RESETVECS (RX)  : origin = 0x00200040, length = 0x400
    INTVECS (RX)    : origin = 0x00201000, length = 0x01B0
    FLASHLOAD (RX)  : origin = 0x00201200, length = 0x2E00
    FLASH (RWX)     : origin = 0x00204000, length = 0x7BF00
    C03SRAM (RWX)   : origin = 0x20000000, length = 0x8000
    S07SHRAM (RWX)  : origin = 0x20008000, length = 0x10000
    CTOMMSGRAM (R)  : origin = 0x2007F000, length = 0x800
    MTOCMSGRAM (RW) : origin = 0x2007F800, length = 0x800


}

SECTIONS
{
    /* Allocate program areas: */
    .text       : > FLASH
    .cinit      : > FLASH
    .pinit      : > FLASH
    .init_array : > FLASH
    
    /* Initalized sections go in Flash */
    .const      : > FLASH

    /* Allocate uninitalized data sections: */
    .data       : > C03SRAM
    .bss        : > C03SRAM
    .sysmem     : > C03SRAM
    .stack      : > C03SRAM
    .cio        : > C03SRAM
    .neardata   : > C03SRAM
    .rodata     : > C03SRAM
    .args       : > C03SRAM
    .intvecs    : > INTVECS
    .vtable     : > C03SRAM
    .resetisr   : > FLASH_BOOT

     ramfuncs   : LOAD = FLASHLOAD,
                  RUN  = C03SRAM,
                  LOAD_START(RamfuncsLoadStart),
                  LOAD_END(RamfuncsLoadEnd),
                  RUN_START(RamfuncsRunStart),
                  PAGE = 0

}

__STACK_TOP = __stack + 256;

 and the "linker.cmd" 

xdc_runtime_Startup__EXECFXN__C = 1;
xdc_runtime_Startup__RESETFXN__C = 1;
TSK_idle = ti_sysbios_knl_Task_Object__table__V + 68;


SECTIONS
{
    .bootVecs:  type = DSECT
    .vecs: load > 0x20000000
    .resetVecs: load > 0x200040
    .ti_catalog_arm_cortexm3_concertoInit_begin: load >> FLASH_BOOT



    xdc.meta: type = COPY
}

Thanks a lot for any help.

Regards,
Walter

 

  • 0
    TI__Mastermind 26780 points

    Walter,

    What version of SYS/BIOS and XDCtools are you using?

    Where is startup_ccs.c coming from?  It sounds like it is trying to configure interrupt vectors and this is colliding with SYS/BIOS’ interrupt configuration.

    It seems the addition of .vtable to C03SRAM is allowing the linker to get past the issue with a missing section specification, but in itself, is not causing the collision with FLASH_BOOT, which is in a completely distant memory region.  It seems that driverlib.lib is bringing with it a collision for FLASH_BOOT. 

    Have you been able to load and run M3 and C28 programs without the above additions?  None of the additions are necessary to boot both M3 and C28 programs from Flash.  If you haven’t been able to boot yet, can you disable the Flash configuration and GPIO control temporarily?

    Scott

  • 0 in reply to ScottG
    Prodigy 140 points

    Hello Scott

    The motivation for including "startup_ccs.c" was that "GPIOPinConfigureCoreSelect ()" is part of the driverlib.  Adding the driverlib to the project results in a request for "g_pfnVectors", which is in "startup_ccs.c" which in turn needs the ".intvecs" section. So I must not use driverlib.lib in Sys/Bios applications?

    You're right, Sys/Bios handles the HWIs. (I worked with a Stellaris 9B90 and FreeRTOS, where the startup file was needed). When I remove the driverlib and instead add "Gpio.c/h" I manage to compile and load the application and run it to main. 

     Am I right that without further configuration of the Flash it runs with default wait states, i.e. 15, and that If I want to change this I still need the "ramfuncs" section to run the initializations in RAM?

    Walter 

     

  • 0 in reply to Walter Saegesser
    TI__Mastermind 26780 points

    Walter,

    Thanks.

    Since my previous post I learned more about some collisions when trying to use driverlib.lib directly with SYS/BIOS.  And that a new SDK product is planned for release in mid-July that provides some integration between the two, with drivers for UART, USB, EMAC, I2C, GPIO and SD drivers.

    Yes, by default the Flash controllers are configured for 15 wait states, with caching disabled.  You can indeed initialize the Flash controllers by running that code from RAM, using the ramfuncs approach.  

    As an alternative: we’ve recently added support for Flash controller initialization for both M3 and C28 sides, via the “Boot” modules that are already in the product (ti.catalog.arm.cortexm3.concertoInit.Boot and ti.catalog.c2800.concertoInit.Boot).  This new support will be released in an XDCtools update planned for the end of the month.  So if you can run with the default Flash configuration for the moment, and then switch over to the new XDCtools, that may be a lot easier.

    Scott

  • 0 in reply to ScottG
    Prodigy 140 points

    Hi Scott

    That's fine. Thanks.

     Walter