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SYS_32K gating on AM37x

AndMan
Intellectual 335 points
Other Parts Discussed in Thread: TPS65023, AM3703

I was looking through the design-in guide for the TPS65023 (http://processors.wiki.ti.com/index.php/OMAP35x-AM37x-DM37x_with_TPS65023:_Design_In_Guide) and was a little confused about two diagrams which which show the 32k oscillator circuit AND'ed with the 1.8V power good signal.

Under the heading "Power Down Sequencing", the text notes:

During power down, all signals driving OMAP35x or AM/DM37x should have a voltage level equal or less than the I/O voltage of OMAP35x or AM/DM37x to avoid driving pins that are unpowered.

Looking at the diagram in this section, it appears the solution is using the AND gate to mitigate this issue by keeping the output at logic level low when 1.8VPG signal is low. However, if the AND gate and the processor's IO rail use the 1.8V source, wouldn't this be a non-issue? Perhaps the signal is AND'ed for a different reason?

A similar diagram is present under the heading "32KHz clock circuit". I completely understand the need for something to sharpen the edges of the clock signal, but it is not clear why the clock must be gated with 1.8V power good signal.

Thanks - AM

  • 0
    TI__Guru 64500 points

    The gate is used to serve 2 purposes, 1) to ensure the clock is removed and not driven into an unpowered sys_32k pin and 2) to sharpen the edges of the 32K crystal/oscillator device.  The 2nd purpose is not explicitly stated in the cited wiki article.

    The AM3703 sys_32k input requirements are specified in the datasheet in Table 4-1.  The transition time (Trise and Tfall) are specified as <10nsec.  Most (at least at the time of writing the article) crystal oscillator devices have one or both of those parameters in the order of hundreds of nanoseconds.  The logic gate is used to sharpen the edges.  It was convenient to use an AND gate to also ensure the clock is removed when 1.8V is not in regulation.

    Also, this article makes no assumptions on the end user's system which might have multiple 1.8V rails running around.  Perhaps in your system you have a need for the 32K clock to still be active while the AM3703 is literally powered down and you didn't want to have multiple 32K crystal/oscillator devices in your system.