Question about clock control for memory controller on Omap platforms

Hi,

I have one very basic question about OMAP memory controller ( also applies to other Socs). Memory controller in OMAP falls under core power domain which is SOC power domain. Memory chips and memory controllers work at different voltages that will result into using two regulators. Does the clock provided to memory chip comes from memory controller. If yes then why two seperate voltages are required one for memory chip and other for memory controllers?

Regards,

Raj