Hi
Now I am in troubles about DDR3 in my project,it is not stable,the program often break donw!
In 8148 datasheet ,it said that programmability is given to control the output driver strength/impedance and slew rate.
But I can't find any informations about those things in DDR PHY Control Register (DDRPHYCR) .
Please help me, give the specific definations about this register,thanks!