dsp develop on dm8168 using dvrrdk kit

Xavier,

What are you planning to do on DSP? Do you have any questions on OSD and SCD code.

OSD and SCD code is compiled using TI's code generation tools (CGTools).

You are right, DSP binaries are loaded from arm Linux.

Hi,

We just   want to develop our algorithm on the dm8168，

And it seems that ti does not give demos or details about how to do this only osd links and scd links are referred,

How many steps we will have to do if we want to devvelop our own dsp algorithm?

Xavier,

You can refer to the app note on SCD integration. You can find  "DM81xx_DVRRDK_SCD_AlgorithmIntegration.pdf" document in appNote folder. It gives a high level picture of the link.

You can refer to the alg link code and integrate your own algorithm. This link provide a framework that allows you to add your own algo.

Currently we support  two features, OSD and SCD, on DSP side.We have separate createTime flags and enable flag for these two tasks. You can add your own structures of create param and separate flag to enable your algo. Follow the code structure of either SCD or OSD to create thread and other associated tasks. These two task are performed depending upon their activation.

 Ritesh Rajore,

please let me know, how the DSP sends processed buffer, after OSD or SCD to next "recipient".

I don't find any connected IPC out link on DSP side.

We send SCD block meteData generated by SCD algorithm to A8. This connection is done in the usecase file. Please refer below two usecase of DM816x for reference

\dvr_rdk\mcfw\src_linux\mcfw_api\usecases\multich_vcap_venc_vdis.c

\dvr_rdk\mcfw\src_linux\mcfw_api\usecases\ti816x\multich_progressive_vcap_venc_vdec_vdis.c

ThanX alot for your reply, Please let me know, if I understood correctly: OSD ALG workd as is following:

- get buffer from DSP IPC IN link (connected to VPSS IPC OUT link)

- perform OSD algorithm itself

- processed buffer (captured frame with logo) returned back to input queue to DSP IPC IN link (because dsp alg link hasn't output queue)

It's right?

.

Yes, you are right.

Here OSD and SCD link work differently. We have connected DSP side link (algLink) as a process link, where in data will be processed and returned back to the previous link. here previous link is VPSS IPC out link.

Once the data is used/update at algLink, we pass the data/framebuffer to next link of VPSS IPC out. 

Flow diagram is like below

VPSS IPC OUT link

|

+-<-------->process Link (DSP Link)

|

Encoder link etc.

ThanX again, but what you can recommned me, what is the best way for my purpose:  DSP ALG get frame via IPC IN link and porcess this buffer, result of my process - bit buffer, let say, array of bytes in size ~1KB (per single video channel, I want use triple or quad buffering per channel), that must be sends to A8 and after completion of algorithm video frame return back to input queue.

1) I mean that listed above diagramm isn't good enougth for my usecase:

 This my usecase, but I don't know how implement:

VPSS IPC OUT link

 |

 +-<------------> process link (DSP link)

 |                                                      |

 |                                                      |

Encoder link etc.                             |

                                                Host A8 (queue "listener")

2) Is SysLink object support "multiple connections" - 2 or more links (as in your diagramm) can are connected to single output? I thinks that each link support only peer-2-peer connection. What about buffers arbitration in case of "multiple"?

Regards.             

Please refer SCD code. We have a similar usecase there. We generate some data by  SCD algo (block metaData) and send it to A8.Frame buffers are passed back to previous link and generated meta data is send to A8 via IPC bits out link.

Ritesh Rajore unfortunatelly havn't SCD sources - only lib files in RDK version 02.00.00.24. Where I can get sources?

hi,

i see the "Software On-Screen  Display  on C674x  Application Programming Interface and  User’s Guide ",

it shows that Application can change this value but need to make sure to rebuild the  DSP  firmware  dvr_rdk_fw_c6xdsp.xe674.

Then how to build DSP  firmware  dvr_rdk_fw_c6xdsp.xe674?

use ccs ? or this can be done on linux pc?

Marat,

I meant SCD link code.

\dvr_rdk\mcfw\src_bios6\links_c6xdsp\alg_link\scd

Xavier,

You can build from linux side as well. We have Makefile support to build bios side binaries. Please refer Install guide for more details.

I have it:

drwxr-xr-x 3 marat marat 4096 2012-07-23 18:16 .

drwxr-xr-x 4 marat marat 4096 2012-05-08 06:28 ..

drwxr-xr-x 2 marat marat 4096 2012-05-08 06:28 lib

-rwxr-xr-x 1 marat marat 1039 2012-05-03 09:24 Makefile

-rwxr-xr-x 1 marat marat  410 2012-05-03 09:24 MAKEFILE.MK

-rwxr-xr-x 1 marat marat 7345 2012-05-03 09:24 scd.h

-rwxr-xr-x 1 marat marat 1173 2012-05-03 09:24 scd_ti.h

-rwxr-xr-x 1 marat marat  603 2012-05-03 09:24 SRC_FILES.MK

./lib:  drwxr-xr-x 3 marat marat    4096 2012-07-23 18:16 ..

-rwxr-xr-x 1 marat marat 1237972 2012-05-03 09:24 scd.ae674

only make files and lib and soem includes

I shared the path. Please check in that path. You are checking at place where SCD library is place. DSP link level code is at different path.

Hello Ritesh Rajore!

 Motion data sends from DSP-ALG link back to DSP-IPC-IN link and after back to M3 module.

Please let me know - Is this problem sends motion data from DSP-ALG via required IPC links direct to A8, as is following connection (not via M3 module):

[SYSTEM_LINK_ID_ALG_0] => [SYSTEM_DSP_LINK_ID_IPC_BITS_OUT_1] => [SYSTEM_HOST_LINK_ID_IPC_BITS_IN_1] => listen task

Please lem me know where I can take example, how to use DMAN3/ACPY3 with algorithm in new MCFW??? (for DM8168)